linux/drivers/phy/qualcomm/phy-qcom-qmp-pcie-msm8996.c

// SPDX-License-Identifier: GPL-2.0
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#include <linux/clk.h>
#include <linux/clk-provider.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/phy/phy.h>
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/reset.h>
#include <linux/slab.h>

#include "phy-qcom-qmp-common.h"

#include "phy-qcom-qmp.h"

/* QPHY_START_CONTROL bits */
#define PLL_READY_GATE_EN …

/* QPHY_COM_PCS_READY_STATUS bit */
#define PCS_READY …

#define PHY_INIT_COMPLETE_TIMEOUT …
#define POWER_DOWN_DELAY_US_MIN …
#define POWER_DOWN_DELAY_US_MAX …

/* set of registers with offsets different per-PHY */
enum qphy_reg_layout { … };

static const unsigned int pciephy_regs_layout[QPHY_LAYOUT_SIZE] = …;

static const struct qmp_phy_init_tbl msm8996_pcie_serdes_tbl[] = …;

static const struct qmp_phy_init_tbl msm8996_pcie_tx_tbl[] = …;

static const struct qmp_phy_init_tbl msm8996_pcie_rx_tbl[] = …;

static const struct qmp_phy_init_tbl msm8996_pcie_pcs_tbl[] = …;

/* struct qmp_phy_cfg - per-PHY initialization config */
struct qmp_phy_cfg { … };

/**
 * struct qmp_phy - per-lane phy descriptor
 *
 * @phy: generic phy
 * @cfg: phy specific configuration
 * @serdes: iomapped memory space for phy's serdes (i.e. PLL)
 * @tx: iomapped memory space for lane's tx
 * @rx: iomapped memory space for lane's rx
 * @pcs: iomapped memory space for lane's pcs
 * @pipe_clk: pipe clock
 * @index: lane index
 * @qmp: QMP phy to which this lane belongs
 * @lane_rst: lane's reset controller
 */
struct qmp_phy { … };

/**
 * struct qcom_qmp - structure holding QMP phy block attributes
 *
 * @dev: device
 *
 * @clks: array of clocks required by phy
 * @resets: array of resets required by phy
 * @vregs: regulator supplies bulk data
 *
 * @phys: array of per-lane phy descriptors
 * @phy_mutex: mutex lock for PHY common block initialization
 * @init_count: phy common block initialization count
 */
struct qcom_qmp { … };

static inline void qphy_setbits(void __iomem *base, u32 offset, u32 val)
{ … }

static inline void qphy_clrbits(void __iomem *base, u32 offset, u32 val)
{ … }

/* list of clocks required by phy */
static const char * const msm8996_phy_clk_l[] = …;

/* list of resets */
static const char * const msm8996_pciephy_reset_l[] = …;

/* list of regulators */
static const char * const qmp_phy_vreg_l[] = …;

static const struct qmp_phy_cfg msm8996_pciephy_cfg = …;

static int qmp_pcie_msm8996_serdes_init(struct qmp_phy *qphy)
{ … }

static int qmp_pcie_msm8996_com_init(struct qmp_phy *qphy)
{ … }

static int qmp_pcie_msm8996_com_exit(struct qmp_phy *qphy)
{ … }

static int qmp_pcie_msm8996_init(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_power_on(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_power_off(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_exit(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_enable(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_disable(struct phy *phy)
{ … }

static int qmp_pcie_msm8996_vreg_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{ … }

static int qmp_pcie_msm8996_reset_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{ … }

static int qmp_pcie_msm8996_clk_init(struct device *dev, const struct qmp_phy_cfg *cfg)
{ … }

static void phy_clk_release_provider(void *res)
{ … }

/*
 * Register a fixed rate pipe clock.
 *
 * The <s>_pipe_clksrc generated by PHY goes to the GCC that gate
 * controls it. The <s>_pipe_clk coming out of the GCC is requested
 * by the PHY driver for its operations.
 * We register the <s>_pipe_clksrc here. The gcc driver takes care
 * of assigning this <s>_pipe_clksrc as parent to <s>_pipe_clk.
 * Below picture shows this relationship.
 *
 *         +---------------+
 *         |   PHY block   |<<---------------------------------------+
 *         |               |                                         |
 *         |   +-------+   |                   +-----+               |
 *   I/P---^-->|  PLL  |---^--->pipe_clksrc--->| GCC |--->pipe_clk---+
 *    clk  |   +-------+   |                   +-----+
 *         +---------------+
 */
static int phy_pipe_clk_register(struct qcom_qmp *qmp, struct device_node *np)
{ … }

static const struct phy_ops qmp_pcie_msm8996_ops = …;

static void qcom_qmp_reset_control_put(void *data)
{ … }

static int qmp_pcie_msm8996_create(struct device *dev, struct device_node *np, int id,
			void __iomem *serdes, const struct qmp_phy_cfg *cfg)
{ … }

static const struct of_device_id qmp_pcie_msm8996_of_match_table[] = …;
MODULE_DEVICE_TABLE(of, qmp_pcie_msm8996_of_match_table);

static int qmp_pcie_msm8996_probe(struct platform_device *pdev)
{ … }

static struct platform_driver qmp_pcie_msm8996_driver = …;

module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;