linux/drivers/phy/qualcomm/phy-qcom-qmp-pcs-pcie-v5.h

/* Only for QMP V5 PHY - PCS_PCIE registers */
/* SPDX-License-Identifier: GPL-2.0 */
/*
 * Copyright (c) 2017, The Linux Foundation. All rights reserved.
 */

#ifndef QCOM_PHY_QMP_PCS_PCIE_V5_H_
#define QCOM_PHY_QMP_PCS_PCIE_V5_H_

/* Only for QMP V5 PHY - PCS_PCIE registers */
#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG2 …
#define QPHY_V5_PCS_PCIE_POWER_STATE_CONFIG4 …
#define QPHY_V5_PCS_PCIE_ENDPOINT_REFCLK_DRIVE …
#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_L …
#define QPHY_V5_PCS_PCIE_L1P1_WAKEUP_DLY_TIME_AUXCLK_H …
#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_L …
#define QPHY_V5_PCS_PCIE_L1P2_WAKEUP_DLY_TIME_AUXCLK_H …
#define QPHY_V5_PCS_PCIE_INT_AUX_CLK_CONFIG1 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG1 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG2 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_CONFIG4 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG2 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG4 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG5 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_MODE2_CONFIG6 …
#define QPHY_V5_PCS_PCIE_OSC_DTCT_ACTIONS …
#define QPHY_V5_PCS_PCIE_EQ_CONFIG1 …
#define QPHY_V5_PCS_PCIE_EQ_CONFIG2 …
#define QPHY_V5_PCS_PCIE_PRESET_P10_PRE …
#define QPHY_V5_PCS_PCIE_PRESET_P10_POST …

#endif