// SPDX-License-Identifier: GPL-2.0-only /* * Samsung SoC USB 1.1/2.0 PHY driver - S5PV210 support * * Copyright (C) 2013 Samsung Electronics Co., Ltd. * Authors: Kamil Debski <[email protected]> */ #include <linux/delay.h> #include <linux/io.h> #include <linux/phy/phy.h> #include "phy-samsung-usb2.h" /* Exynos USB PHY registers */ /* PHY power control */ #define S5PV210_UPHYPWR … #define S5PV210_UPHYPWR_PHY0_SUSPEND … #define S5PV210_UPHYPWR_PHY0_PWR … #define S5PV210_UPHYPWR_PHY0_OTG_PWR … #define S5PV210_UPHYPWR_PHY0 … #define S5PV210_UPHYPWR_PHY1_SUSPEND … #define S5PV210_UPHYPWR_PHY1_PWR … #define S5PV210_UPHYPWR_PHY1 … /* PHY clock control */ #define S5PV210_UPHYCLK … #define S5PV210_UPHYCLK_PHYFSEL_MASK … #define S5PV210_UPHYCLK_PHYFSEL_48MHZ … #define S5PV210_UPHYCLK_PHYFSEL_24MHZ … #define S5PV210_UPHYCLK_PHYFSEL_12MHZ … #define S5PV210_UPHYCLK_PHY0_ID_PULLUP … #define S5PV210_UPHYCLK_PHY0_COMMON_ON … #define S5PV210_UPHYCLK_PHY1_COMMON_ON … /* PHY reset control */ #define S5PV210_UPHYRST … #define S5PV210_URSTCON_PHY0 … #define S5PV210_URSTCON_OTG_HLINK … #define S5PV210_URSTCON_OTG_PHYLINK … #define S5PV210_URSTCON_PHY1_ALL … #define S5PV210_URSTCON_HOST_LINK_ALL … /* Isolation, configured in the power management unit */ #define S5PV210_USB_ISOL_OFFSET … #define S5PV210_USB_ISOL_DEVICE … #define S5PV210_USB_ISOL_HOST … enum s5pv210_phy_id { … }; /* * s5pv210_rate_to_clk() converts the supplied clock rate to the value that * can be written to the phy register. */ static int s5pv210_rate_to_clk(unsigned long rate, u32 *reg) { … } static void s5pv210_isol(struct samsung_usb2_phy_instance *inst, bool on) { … } static void s5pv210_phy_pwr(struct samsung_usb2_phy_instance *inst, bool on) { … } static int s5pv210_power_on(struct samsung_usb2_phy_instance *inst) { … } static int s5pv210_power_off(struct samsung_usb2_phy_instance *inst) { … } static const struct samsung_usb2_common_phy s5pv210_phys[S5PV210_NUM_PHYS] = …; const struct samsung_usb2_phy_config s5pv210_usb2_phy_config = …;
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