// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (C) 2014-2017 Broadcom */ /* * This file contains the Broadcom Iproc GPIO driver that supports 3 * GPIO controllers on Iproc including the ASIU GPIO controller, the * chipCommonG GPIO controller, and the always-on GPIO controller. Basic * PINCONF such as bias pull up/down, and drive strength are also supported * in this driver. * * It provides the functionality where pins from the GPIO can be * individually muxed to GPIO function, if individual pad * configuration is supported, through the interaction with respective * SoCs IOMUX controller. */ #include <linux/gpio/driver.h> #include <linux/interrupt.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/kernel.h> #include <linux/of.h> #include <linux/platform_device.h> #include <linux/seq_file.h> #include <linux/slab.h> #include <linux/pinctrl/consumer.h> #include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinconf.h> #include <linux/pinctrl/pinctrl.h> #include "../pinctrl-utils.h" #define IPROC_GPIO_DATA_IN_OFFSET … #define IPROC_GPIO_DATA_OUT_OFFSET … #define IPROC_GPIO_OUT_EN_OFFSET … #define IPROC_GPIO_INT_TYPE_OFFSET … #define IPROC_GPIO_INT_DE_OFFSET … #define IPROC_GPIO_INT_EDGE_OFFSET … #define IPROC_GPIO_INT_MSK_OFFSET … #define IPROC_GPIO_INT_STAT_OFFSET … #define IPROC_GPIO_INT_MSTAT_OFFSET … #define IPROC_GPIO_INT_CLR_OFFSET … #define IPROC_GPIO_PAD_RES_OFFSET … #define IPROC_GPIO_RES_EN_OFFSET … /* drive strength control for ASIU GPIO */ #define IPROC_GPIO_ASIU_DRV0_CTRL_OFFSET … /* pinconf for CCM GPIO */ #define IPROC_GPIO_PULL_DN_OFFSET … #define IPROC_GPIO_PULL_UP_OFFSET … /* pinconf for CRMU(aon) GPIO and CCM GPIO*/ #define IPROC_GPIO_DRV_CTRL_OFFSET … #define GPIO_BANK_SIZE … #define NGPIOS_PER_BANK … #define GPIO_BANK(pin) … #define IPROC_GPIO_REG(pin, reg) … #define IPROC_GPIO_SHIFT(pin) … #define GPIO_DRV_STRENGTH_BIT_SHIFT … #define GPIO_DRV_STRENGTH_BITS … #define GPIO_DRV_STRENGTH_BIT_MASK … enum iproc_pinconf_param { … }; enum iproc_pinconf_ctrl_type { … }; /* * Iproc GPIO core * * @dev: pointer to device * @base: I/O register base for Iproc GPIO controller * @io_ctrl: I/O register base for certain type of Iproc GPIO controller that * has the PINCONF support implemented outside of the GPIO block * @lock: lock to protect access to I/O registers * @gc: GPIO chip * @num_banks: number of GPIO banks, each bank supports up to 32 GPIOs * @pinmux_is_supported: flag to indicate this GPIO controller contains pins * that can be individually muxed to GPIO * @pinconf_disable: contains a list of PINCONF parameters that need to be * disabled * @nr_pinconf_disable: total number of PINCONF parameters that need to be * disabled * @pctl: pointer to pinctrl_dev * @pctldesc: pinctrl descriptor */ struct iproc_gpio { … }; /* * Mapping from PINCONF pins to GPIO pins is 1-to-1 */ static inline unsigned iproc_pin_to_gpio(unsigned pin) { … } /** * iproc_set_bit - set or clear one bit (corresponding to the GPIO pin) in a * Iproc GPIO register * * @chip: Iproc GPIO device * @reg: register offset * @gpio: GPIO pin * @set: set or clear */ static inline void iproc_set_bit(struct iproc_gpio *chip, unsigned int reg, unsigned gpio, bool set) { … } static inline bool iproc_get_bit(struct iproc_gpio *chip, unsigned int reg, unsigned gpio) { … } static void iproc_gpio_irq_handler(struct irq_desc *desc) { … } static void iproc_gpio_irq_ack(struct irq_data *d) { … } /** * iproc_gpio_irq_set_mask - mask/unmask a GPIO interrupt * * @d: IRQ chip data * @unmask: mask/unmask GPIO interrupt */ static void iproc_gpio_irq_set_mask(struct irq_data *d, bool unmask) { … } static void iproc_gpio_irq_mask(struct irq_data *d) { … } static void iproc_gpio_irq_unmask(struct irq_data *d) { … } static int iproc_gpio_irq_set_type(struct irq_data *d, unsigned int type) { … } static void iproc_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) { … } static const struct irq_chip iproc_gpio_irq_chip = …; /* * Request the Iproc IOMUX pinmux controller to mux individual pins to GPIO */ static int iproc_gpio_request(struct gpio_chip *gc, unsigned offset) { … } static void iproc_gpio_free(struct gpio_chip *gc, unsigned offset) { … } static int iproc_gpio_direction_input(struct gpio_chip *gc, unsigned gpio) { … } static int iproc_gpio_direction_output(struct gpio_chip *gc, unsigned gpio, int val) { … } static int iproc_gpio_get_direction(struct gpio_chip *gc, unsigned int gpio) { … } static void iproc_gpio_set(struct gpio_chip *gc, unsigned gpio, int val) { … } static int iproc_gpio_get(struct gpio_chip *gc, unsigned gpio) { … } /* * Mapping of the iProc PINCONF parameters to the generic pin configuration * parameters */ static const enum pin_config_param iproc_pinconf_disable_map[] = …; static bool iproc_pinconf_param_is_disabled(struct iproc_gpio *chip, enum pin_config_param param) { … } static int iproc_pinconf_disable_map_create(struct iproc_gpio *chip, unsigned long disable_mask) { … } static int iproc_get_groups_count(struct pinctrl_dev *pctldev) { … } /* * Only one group: "gpio_grp", since this local pinctrl device only performs * GPIO specific PINCONF configurations */ static const char *iproc_get_group_name(struct pinctrl_dev *pctldev, unsigned selector) { … } static const struct pinctrl_ops iproc_pctrl_ops = …; static int iproc_gpio_set_pull(struct iproc_gpio *chip, unsigned gpio, bool disable, bool pull_up) { … } static void iproc_gpio_get_pull(struct iproc_gpio *chip, unsigned gpio, bool *disable, bool *pull_up) { … } #define DRV_STRENGTH_OFFSET(gpio, bit, type) … static int iproc_gpio_set_strength(struct iproc_gpio *chip, unsigned gpio, unsigned strength) { … } static int iproc_gpio_get_strength(struct iproc_gpio *chip, unsigned gpio, u16 *strength) { … } static int iproc_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config) { … } static int iproc_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs, unsigned num_configs) { … } static const struct pinconf_ops iproc_pconf_ops = …; /* * Iproc GPIO controller supports some PINCONF related configurations such as * pull up, pull down, and drive strength, when the pin is configured to GPIO * * Here a local pinctrl device is created with simple 1-to-1 pin mapping to the * local GPIO pins */ static int iproc_gpio_register_pinconf(struct iproc_gpio *chip) { … } static const struct of_device_id iproc_gpio_of_match[] = …; static int iproc_gpio_probe(struct platform_device *pdev) { … } static struct platform_driver iproc_gpio_driver = …; static int __init iproc_gpio_init(void) { … } arch_initcall_sync(iproc_gpio_init);
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