/* SPDX-License-Identifier: GPL-2.0 */ /* * Device Tree defines for Lochnagar pinctrl * * Copyright (c) 2018 Cirrus Logic, Inc. and * Cirrus Logic International Semiconductor Ltd. * * Author: Charles Keepax <[email protected]> */ #ifndef DT_BINDINGS_PINCTRL_LOCHNAGAR_H #define DT_BINDINGS_PINCTRL_LOCHNAGAR_H #define LOCHNAGAR1_PIN_CDC_RESET … #define LOCHNAGAR1_PIN_DSP_RESET … #define LOCHNAGAR1_PIN_CDC_CIF1MODE … #define LOCHNAGAR1_PIN_NUM_GPIOS … #define LOCHNAGAR2_PIN_CDC_RESET … #define LOCHNAGAR2_PIN_DSP_RESET … #define LOCHNAGAR2_PIN_CDC_CIF1MODE … #define LOCHNAGAR2_PIN_CDC_LDOENA … #define LOCHNAGAR2_PIN_SPDIF_HWMODE … #define LOCHNAGAR2_PIN_SPDIF_RESET … #define LOCHNAGAR2_PIN_FPGA_GPIO1 … #define LOCHNAGAR2_PIN_FPGA_GPIO2 … #define LOCHNAGAR2_PIN_FPGA_GPIO3 … #define LOCHNAGAR2_PIN_FPGA_GPIO4 … #define LOCHNAGAR2_PIN_FPGA_GPIO5 … #define LOCHNAGAR2_PIN_FPGA_GPIO6 … #define LOCHNAGAR2_PIN_CDC_GPIO1 … #define LOCHNAGAR2_PIN_CDC_GPIO2 … #define LOCHNAGAR2_PIN_CDC_GPIO3 … #define LOCHNAGAR2_PIN_CDC_GPIO4 … #define LOCHNAGAR2_PIN_CDC_GPIO5 … #define LOCHNAGAR2_PIN_CDC_GPIO6 … #define LOCHNAGAR2_PIN_CDC_GPIO7 … #define LOCHNAGAR2_PIN_CDC_GPIO8 … #define LOCHNAGAR2_PIN_DSP_GPIO1 … #define LOCHNAGAR2_PIN_DSP_GPIO2 … #define LOCHNAGAR2_PIN_DSP_GPIO3 … #define LOCHNAGAR2_PIN_DSP_GPIO4 … #define LOCHNAGAR2_PIN_DSP_GPIO5 … #define LOCHNAGAR2_PIN_DSP_GPIO6 … #define LOCHNAGAR2_PIN_GF_GPIO2 … #define LOCHNAGAR2_PIN_GF_GPIO3 … #define LOCHNAGAR2_PIN_GF_GPIO7 … #define LOCHNAGAR2_PIN_CDC_AIF1_BCLK … #define LOCHNAGAR2_PIN_CDC_AIF1_RXDAT … #define LOCHNAGAR2_PIN_CDC_AIF1_LRCLK … #define LOCHNAGAR2_PIN_CDC_AIF1_TXDAT … #define LOCHNAGAR2_PIN_CDC_AIF2_BCLK … #define LOCHNAGAR2_PIN_CDC_AIF2_RXDAT … #define LOCHNAGAR2_PIN_CDC_AIF2_LRCLK … #define LOCHNAGAR2_PIN_CDC_AIF2_TXDAT … #define LOCHNAGAR2_PIN_CDC_AIF3_BCLK … #define LOCHNAGAR2_PIN_CDC_AIF3_RXDAT … #define LOCHNAGAR2_PIN_CDC_AIF3_LRCLK … #define LOCHNAGAR2_PIN_CDC_AIF3_TXDAT … #define LOCHNAGAR2_PIN_DSP_AIF1_BCLK … #define LOCHNAGAR2_PIN_DSP_AIF1_RXDAT … #define LOCHNAGAR2_PIN_DSP_AIF1_LRCLK … #define LOCHNAGAR2_PIN_DSP_AIF1_TXDAT … #define LOCHNAGAR2_PIN_DSP_AIF2_BCLK … #define LOCHNAGAR2_PIN_DSP_AIF2_RXDAT … #define LOCHNAGAR2_PIN_DSP_AIF2_LRCLK … #define LOCHNAGAR2_PIN_DSP_AIF2_TXDAT … #define LOCHNAGAR2_PIN_PSIA1_BCLK … #define LOCHNAGAR2_PIN_PSIA1_RXDAT … #define LOCHNAGAR2_PIN_PSIA1_LRCLK … #define LOCHNAGAR2_PIN_PSIA1_TXDAT … #define LOCHNAGAR2_PIN_PSIA2_BCLK … #define LOCHNAGAR2_PIN_PSIA2_RXDAT … #define LOCHNAGAR2_PIN_PSIA2_LRCLK … #define LOCHNAGAR2_PIN_PSIA2_TXDAT … #define LOCHNAGAR2_PIN_GF_AIF3_BCLK … #define LOCHNAGAR2_PIN_GF_AIF3_RXDAT … #define LOCHNAGAR2_PIN_GF_AIF3_LRCLK … #define LOCHNAGAR2_PIN_GF_AIF3_TXDAT … #define LOCHNAGAR2_PIN_GF_AIF4_BCLK … #define LOCHNAGAR2_PIN_GF_AIF4_RXDAT … #define LOCHNAGAR2_PIN_GF_AIF4_LRCLK … #define LOCHNAGAR2_PIN_GF_AIF4_TXDAT … #define LOCHNAGAR2_PIN_GF_AIF1_BCLK … #define LOCHNAGAR2_PIN_GF_AIF1_RXDAT … #define LOCHNAGAR2_PIN_GF_AIF1_LRCLK … #define LOCHNAGAR2_PIN_GF_AIF1_TXDAT … #define LOCHNAGAR2_PIN_GF_AIF2_BCLK … #define LOCHNAGAR2_PIN_GF_AIF2_RXDAT … #define LOCHNAGAR2_PIN_GF_AIF2_LRCLK … #define LOCHNAGAR2_PIN_GF_AIF2_TXDAT … #define LOCHNAGAR2_PIN_DSP_UART1_RX … #define LOCHNAGAR2_PIN_DSP_UART1_TX … #define LOCHNAGAR2_PIN_DSP_UART2_RX … #define LOCHNAGAR2_PIN_DSP_UART2_TX … #define LOCHNAGAR2_PIN_GF_UART2_RX … #define LOCHNAGAR2_PIN_GF_UART2_TX … #define LOCHNAGAR2_PIN_USB_UART_RX … #define LOCHNAGAR2_PIN_CDC_PDMCLK1 … #define LOCHNAGAR2_PIN_CDC_PDMDAT1 … #define LOCHNAGAR2_PIN_CDC_PDMCLK2 … #define LOCHNAGAR2_PIN_CDC_PDMDAT2 … #define LOCHNAGAR2_PIN_CDC_DMICCLK1 … #define LOCHNAGAR2_PIN_CDC_DMICDAT1 … #define LOCHNAGAR2_PIN_CDC_DMICCLK2 … #define LOCHNAGAR2_PIN_CDC_DMICDAT2 … #define LOCHNAGAR2_PIN_CDC_DMICCLK3 … #define LOCHNAGAR2_PIN_CDC_DMICDAT3 … #define LOCHNAGAR2_PIN_CDC_DMICCLK4 … #define LOCHNAGAR2_PIN_CDC_DMICDAT4 … #define LOCHNAGAR2_PIN_DSP_DMICCLK1 … #define LOCHNAGAR2_PIN_DSP_DMICDAT1 … #define LOCHNAGAR2_PIN_DSP_DMICCLK2 … #define LOCHNAGAR2_PIN_DSP_DMICDAT2 … #define LOCHNAGAR2_PIN_I2C2_SCL … #define LOCHNAGAR2_PIN_I2C2_SDA … #define LOCHNAGAR2_PIN_I2C3_SCL … #define LOCHNAGAR2_PIN_I2C3_SDA … #define LOCHNAGAR2_PIN_I2C4_SCL … #define LOCHNAGAR2_PIN_I2C4_SDA … #define LOCHNAGAR2_PIN_DSP_STANDBY … #define LOCHNAGAR2_PIN_CDC_MCLK1 … #define LOCHNAGAR2_PIN_CDC_MCLK2 … #define LOCHNAGAR2_PIN_DSP_CLKIN … #define LOCHNAGAR2_PIN_PSIA1_MCLK … #define LOCHNAGAR2_PIN_PSIA2_MCLK … #define LOCHNAGAR2_PIN_GF_GPIO1 … #define LOCHNAGAR2_PIN_GF_GPIO5 … #define LOCHNAGAR2_PIN_DSP_GPIO20 … #define LOCHNAGAR2_PIN_NUM_GPIOS … #endif
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