linux/drivers/pinctrl/qcom/pinctrl-sm8250.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
 */

#include <linux/module.h>
#include <linux/of.h>
#include <linux/platform_device.h>

#include "pinctrl-msm.h"

static const char * const sm8250_tiles[] =;

enum {};

#define REG_SIZE
#define PINGROUP(id, _tile, f1, f2, f3, f4, f5, f6, f7, f8, f9)

#define SDC_PINGROUP(pg_name, ctl, pull, drv)

#define UFS_RESET(pg_name, offset)

static const struct pinctrl_pin_desc sm8250_pins[] =;

#define DECLARE_MSM_GPIO_PINS(pin)
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();
DECLARE_MSM_GPIO_PINS();

static const unsigned int ufs_reset_pins[] =;
static const unsigned int sdc2_clk_pins[] =;
static const unsigned int sdc2_cmd_pins[] =;
static const unsigned int sdc2_data_pins[] =;

enum sm8250_functions {};

static const char * const tsif1_data_groups[] =;
static const char * const sdc41_groups[] =;
static const char * const tsif1_sync_groups[] =;
static const char * const sdc40_groups[] =;
static const char * const aoss_cti_groups[] =;
static const char * const phase_flag_groups[] =;
static const char * const sd_write_groups[] =;
static const char * const pci_e0_groups[] =;
static const char * const pci_e1_groups[] =;
static const char * const pci_e2_groups[] =;
static const char * const tgu_ch0_groups[] =;
static const char * const atest_groups[] =;
static const char * const tgu_ch3_groups[] =;
static const char * const tsif1_error_groups[] =;
static const char * const tgu_ch1_groups[] =;
static const char * const tsif0_error_groups[] =;
static const char * const tgu_ch2_groups[] =;
static const char * const cam_mclk_groups[] =;
static const char * const ddr_bist_groups[] =;
static const char * const pll_bypassnl_groups[] =;
static const char * const pll_reset_groups[] =;
static const char * const cci_i2c_groups[] =;
static const char * const qdss_gpio_groups[] =;
static const char * const gcc_gp1_groups[] =;
static const char * const gcc_gp2_groups[] =;
static const char * const gcc_gp3_groups[] =;
static const char * const cci_timer0_groups[] =;
static const char * const cci_timer1_groups[] =;
static const char * const cci_timer2_groups[] =;
static const char * const cci_timer3_groups[] =;
static const char * const cci_async_groups[] =;
static const char * const cci_timer4_groups[] =;
static const char * const qup2_groups[] =;
static const char * const qup3_groups[] =;
static const char * const tsense_pwm1_groups[] =;
static const char * const tsense_pwm2_groups[] =;
static const char * const qup9_groups[] =;
static const char * const qup10_groups[] =;
static const char * const mi2s2_sck_groups[] =;
static const char * const mi2s2_data0_groups[] =;
static const char * const mi2s2_ws_groups[] =;
static const char * const pri_mi2s_groups[] =;
static const char * const sec_mi2s_groups[] =;
static const char * const audio_ref_groups[] =;
static const char * const mi2s2_data1_groups[] =;
static const char * const mi2s0_sck_groups[] =;
static const char * const mi2s0_data0_groups[] =;
static const char * const mi2s0_data1_groups[] =;
static const char * const mi2s0_ws_groups[] =;
static const char * const lpass_slimbus_groups[] =;
static const char * const mi2s1_sck_groups[] =;
static const char * const mi2s1_data0_groups[] =;
static const char * const mi2s1_data1_groups[] =;
static const char * const mi2s1_ws_groups[] =;
static const char * const cri_trng0_groups[] =;
static const char * const cri_trng1_groups[] =;
static const char * const cri_trng_groups[] =;
static const char * const sp_cmu_groups[] =;
static const char * const prng_rosc_groups[] =;
static const char * const qup19_groups[] =;
static const char * const gpio_groups[] =;
static const char * const qdss_cti_groups[] =;
static const char * const qup1_groups[] =;
static const char * const ibi_i3c_groups[] =;
static const char * const qup_l4_groups[] =;
static const char * const qup_l5_groups[] =;
static const char * const qup4_groups[] =;
static const char * const qup5_groups[] =;
static const char * const qup6_groups[] =;
static const char * const qup7_groups[] =;
static const char * const qup8_groups[] =;
static const char * const qup0_groups[] =;
static const char * const qup12_groups[] =;
static const char * const qup13_groups[] =;
static const char * const qup14_groups[] =;
static const char * const ddr_pxi3_groups[] =;
static const char * const ddr_pxi1_groups[] =;
static const char * const vsense_trigger_groups[] =;
static const char * const qup15_groups[] =;
static const char * const dbg_out_groups[] =;
static const char * const qup16_groups[] =;
static const char * const qup17_groups[] =;
static const char * const ddr_pxi0_groups[] =;
static const char * const jitter_bist_groups[] =;
static const char * const pll_bist_groups[] =;
static const char * const ddr_pxi2_groups[] =;
static const char * const qup18_groups[] =;
static const char * const qup11_groups[] =;
static const char * const usb2phy_ac_groups[] =;
static const char * const qup_l6_groups[] =;
static const char * const usb_phy_groups[] =;
static const char * const pll_clk_groups[] =;
static const char * const mdp_vsync_groups[] =;
static const char * const dp_lcd_groups[] =;
static const char * const dp_hot_groups[] =;
static const char * const qspi_cs_groups[] =;
static const char * const tsif0_clk_groups[] =;
static const char * const qspi0_groups[] =;
static const char * const tsif0_en_groups[] =;
static const char * const mdp_vsync0_groups[] =;
static const char * const mdp_vsync1_groups[] =;
static const char * const mdp_vsync2_groups[] =;
static const char * const mdp_vsync3_groups[] =;
static const char * const qspi1_groups[] =;
static const char * const tsif0_data_groups[] =;
static const char * const sdc4_cmd_groups[] =;
static const char * const qspi2_groups[] =;
static const char * const tsif0_sync_groups[] =;
static const char * const sdc43_groups[] =;
static const char * const qspi_clk_groups[] =;
static const char * const tsif1_clk_groups[] =;
static const char * const sdc4_clk_groups[] =;
static const char * const qspi3_groups[] =;
static const char * const tsif1_en_groups[] =;
static const char * const sdc42_groups[] =;

static const struct pinfunction sm8250_functions[] =;

/* Every pin is maintained as a single group, and missing or non-existing pin
 * would be maintained as dummy group to synchronize pin group index with
 * pin descriptor registered with pinctrl core.
 * Clients would not be able to request these dummy pin groups.
 */
static const struct msm_pingroup sm8250_groups[] =;

static const struct msm_gpio_wakeirq_map sm8250_pdc_map[] =;

static const struct msm_pinctrl_soc_data sm8250_pinctrl =;

static int sm8250_pinctrl_probe(struct platform_device *pdev)
{}

static const struct of_device_id sm8250_pinctrl_of_match[] =;

static struct platform_driver sm8250_pinctrl_driver =;

static int __init sm8250_pinctrl_init(void)
{}
arch_initcall(sm8250_pinctrl_init);

static void __exit sm8250_pinctrl_exit(void)
{}
module_exit(sm8250_pinctrl_exit);

MODULE_DESCRIPTION();
MODULE_LICENSE();
MODULE_DEVICE_TABLE(of, sm8250_pinctrl_of_match);