linux/drivers/gpu/drm/xe/xe_device_types.h

/* SPDX-License-Identifier: MIT */
/*
 * Copyright © 2022-2023 Intel Corporation
 */

#ifndef _XE_DEVICE_TYPES_H_
#define _XE_DEVICE_TYPES_H_

#include <linux/pci.h>

#include <drm/drm_device.h>
#include <drm/drm_file.h>
#include <drm/ttm/ttm_device.h>

#include "xe_devcoredump_types.h"
#include "xe_heci_gsc.h"
#include "xe_gt_types.h"
#include "xe_lmtt_types.h"
#include "xe_memirq_types.h"
#include "xe_oa.h"
#include "xe_platform_types.h"
#include "xe_pt_types.h"
#include "xe_sriov_types.h"
#include "xe_step_types.h"

#if IS_ENABLED(CONFIG_DRM_XE_DISPLAY)
#include "soc/intel_pch.h"
#include "intel_display_core.h"
#include "intel_display_device.h"
#endif

struct xe_ggtt;
struct xe_pat_ops;

#define XE_BO_INVALID_OFFSET …

#define GRAPHICS_VER(xe) …
#define MEDIA_VER(xe) …
#define GRAPHICS_VERx100(xe) …
#define MEDIA_VERx100(xe) …
#define IS_DGFX(xe) …
#define HAS_HECI_GSCFI(xe) …

#define XE_VRAM_FLAGS_NEED64K …

#define XE_GT0 …
#define XE_GT1 …
#define XE_MAX_TILES_PER_DEVICE …

#define XE_MAX_ASID …

#define IS_PLATFORM_STEP(_xe, _platform, min_step, max_step) …
#define IS_SUBPLATFORM_STEP(_xe, _platform, sub, min_step, max_step) …

#define tile_to_xe(tile__) …

/**
 * struct xe_mem_region - memory region structure
 * This is used to describe a memory region in xe
 * device, such as HBM memory or CXL extension memory.
 */
struct xe_mem_region { … };

/**
 * struct xe_tile - hardware tile structure
 *
 * From a driver perspective, a "tile" is effectively a complete GPU, containing
 * an SGunit, 1-2 GTs, and (for discrete platforms) VRAM.
 *
 * Multi-tile platforms effectively bundle multiple GPUs behind a single PCI
 * device and designate one "root" tile as being responsible for external PCI
 * communication.  PCI BAR0 exposes the GGTT and MMIO register space for each
 * tile in a stacked layout, and PCI BAR2 exposes the local memory associated
 * with each tile similarly.  Device-wide interrupts can be enabled/disabled
 * at the root tile, and the MSTR_TILE_INTR register will report which tiles
 * have interrupts that need servicing.
 */
struct xe_tile { … };

/**
 * struct xe_device - Top level struct of XE device
 */
struct xe_device { … };

/**
 * struct xe_file - file handle for XE driver
 */
struct xe_file { … };

#endif