/* SPDX-License-Identifier: MIT */ /* * Copyright © 2022 Intel Corporation */ #ifndef _XE_GUC_ENGINE_TYPES_H_ #define _XE_GUC_ENGINE_TYPES_H_ #include <linux/spinlock.h> #include <linux/workqueue.h> #include "xe_gpu_scheduler_types.h" struct dma_fence; struct xe_exec_queue; /** * struct xe_guc_exec_queue - GuC specific state for an xe_exec_queue */ struct xe_guc_exec_queue { … }; #endif