linux/drivers/gpu/drm/xe/xe_gsc.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2023 Intel Corporation
 */

#include "xe_gsc.h"

#include <linux/delay.h>

#include <drm/drm_managed.h>

#include <generated/xe_wa_oob.h>

#include "abi/gsc_mkhi_commands_abi.h"
#include "xe_bb.h"
#include "xe_bo.h"
#include "xe_device.h"
#include "xe_exec_queue.h"
#include "xe_force_wake.h"
#include "xe_gsc_proxy.h"
#include "xe_gsc_submit.h"
#include "xe_gt.h"
#include "xe_gt_mcr.h"
#include "xe_gt_printk.h"
#include "xe_guc_pc.h"
#include "xe_huc.h"
#include "xe_map.h"
#include "xe_mmio.h"
#include "xe_pm.h"
#include "xe_sched_job.h"
#include "xe_uc_fw.h"
#include "xe_wa.h"
#include "instructions/xe_gsc_commands.h"
#include "regs/xe_gsc_regs.h"
#include "regs/xe_gt_regs.h"

static struct xe_gt *
gsc_to_gt(struct xe_gsc *gsc)
{ … }

static int memcpy_fw(struct xe_gsc *gsc)
{ … }

static int emit_gsc_upload(struct xe_gsc *gsc)
{ … }

#define version_query_wr(xe_, map_, offset_, field_, val_) …
#define version_query_rd(xe_, map_, offset_, field_) …

static u32 emit_version_query_msg(struct xe_device *xe, struct iosys_map *map, u32 wr_offset)
{ … }

#define GSC_VER_PKT_SZ …
static int query_compatibility_version(struct xe_gsc *gsc)
{ … }

static int gsc_fw_is_loaded(struct xe_gt *gt)
{ … }

static int gsc_fw_wait(struct xe_gt *gt)
{ … }

static int gsc_upload(struct xe_gsc *gsc)
{ … }

static int gsc_upload_and_init(struct xe_gsc *gsc)
{ … }

static int gsc_er_complete(struct xe_gt *gt)
{ … }

static void gsc_work(struct work_struct *work)
{ … }

void xe_gsc_hwe_irq_handler(struct xe_hw_engine *hwe, u16 intr_vec)
{ … }

int xe_gsc_init(struct xe_gsc *gsc)
{ … }

static void free_resources(struct drm_device *drm, void *arg)
{ … }

int xe_gsc_init_post_hwconfig(struct xe_gsc *gsc)
{ … }

void xe_gsc_load_start(struct xe_gsc *gsc)
{ … }

void xe_gsc_wait_for_worker_completion(struct xe_gsc *gsc)
{ … }

/**
 * xe_gsc_remove() - Clean up the GSC structures before driver removal
 * @gsc: the GSC uC
 */
void xe_gsc_remove(struct xe_gsc *gsc)
{ … }

/*
 * wa_14015076503: if the GSC FW is loaded, we need to alert it before doing a
 * GSC engine reset by writing a notification bit in the GS1 register and then
 * triggering an interrupt to GSC; from the interrupt it will take up to 200ms
 * for the FW to get prepare for the reset, so we need to wait for that amount
 * of time.
 * After the reset is complete we need to then clear the GS1 register.
 */
void xe_gsc_wa_14015076503(struct xe_gt *gt, bool prep)
{ … }