linux/drivers/gpu/drm/xe/xe_lmtt_2l.c

// SPDX-License-Identifier: MIT
/*
 * Copyright © 2023 Intel Corporation
 */

#include <linux/align.h>
#include <linux/bitfield.h>
#include <linux/log2.h>
#include <linux/sizes.h>

#include "xe_lmtt_types.h"
#include "xe_macros.h"

/**
 * DOC: Two-Level LMTT Structure
 *
 * LMHAW (Local Memory Host Address Width) is 37 bit (128GB)
 *
 * LMGAW (Local Memory Guest Address Width) is 37 bit (128GB)
 *
 * The following figure illustrates the structure and function of the 2L LMTT::
 *
 *            LMTT Directory
 *           (1 Entry per VF)
 *            +-----------+                     LMTT (per VF)
 *            |           |                     +-----------+
 *            |           |                     |           |
 *            |           |          index:     |           |
 *            |           |          LMEM VF    +===========+
 *            |           |          offset --> |    PTE    | ==> LMEM PF offset
 *            |           |                     +===========+
 *   index:   +===========+                     |           |
 *   VFID --> |    PDE    |  -----------------> +-----------+
 *            +===========+                    /              \.
 *            |           |                   /                 \.
 *            |           |                  /                    \.
 *            |           |                 /                       \.
 *            +-----------+ <== [LMTT Directory Ptr]                  \.
 *           /             \              /                             \.
 *          /               \         +-----------+-----------------+------+---+
 *         /                 \        | 31:HAW-16 |        HAW-17:5 |  4:1 | 0 |
 *        /                   \       +===========+=================+======+===+
 *       /                     \      |  Reserved | LMEM Page (2MB) | Rsvd | V |
 *      /                       \     +-----------+-----------------+------+---+
 *     /                         \.
 *   +-----------+-----------------+------+---+
 *   | 31:HAW-12 |        HAW-13:4 |  3:1 | 0 |
 *   +===========+=================+======+===+
 *   |  Reserved | LMTT Ptr (64KB) | Rsvd | V |
 *   +-----------+-----------------+------+---+
 *
 */

lmtt_2l_pde_t;
lmtt_2l_pte_t;

#if IS_ENABLED(CONFIG_DRM_XE_LMTT_2L_128GB)
#define LMTT_2L_HAW …
#else
#define LMTT_2L_HAW …
#endif

#define LMTT_2L_PDE_MAX_NUM …
#define LMTT_2L_PDE_LMTT_PTR …
#define LMTT_2L_PDE_VALID …

#define LMTT_2L_PTE_MAX_NUM …
#define LMTT_2L_PTE_LMEM_PAGE …
#define LMTT_2L_PTE_VALID …

static unsigned int lmtt_2l_root_pd_level(void)
{ … }

static unsigned int lmtt_2l_pte_num(unsigned int level)
{ … }

static unsigned int lmtt_2l_pte_size(unsigned int level)
{ … }

static unsigned int lmtt_2l_pte_shift(unsigned int level)
{ … }

static unsigned int lmtt_2l_pte_index(u64 addr, unsigned int level)
{ … }

static u64 lmtt_2l_pte_encode(unsigned long offset, unsigned int level)
{ … }

const struct xe_lmtt_ops lmtt_2l_ops = …;