linux/drivers/gpu/drm/mgag200/mgag200_mode.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright 2010 Matt Turner.
 * Copyright 2012 Red Hat
 *
 * Authors: Matthew Garrett
 *	    Matt Turner
 *	    Dave Airlie
 */

#include <linux/delay.h>
#include <linux/iosys-map.h>

#include <drm/drm_atomic.h>
#include <drm/drm_atomic_helper.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_edid.h>
#include <drm/drm_format_helper.h>
#include <drm/drm_fourcc.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>
#include <drm/drm_gem_framebuffer_helper.h>
#include <drm/drm_panic.h>
#include <drm/drm_print.h>

#include "mgag200_ddc.h"
#include "mgag200_drv.h"

/*
 * This file contains setup code for the CRTC.
 */

void mgag200_crtc_set_gamma_linear(struct mga_device *mdev,
				   const struct drm_format_info *format)
{ … }

void mgag200_crtc_set_gamma(struct mga_device *mdev,
			    const struct drm_format_info *format,
			    struct drm_color_lut *lut)
{ … }

static inline void mga_wait_vsync(struct mga_device *mdev)
{ … }

static inline void mga_wait_busy(struct mga_device *mdev)
{ … }

/*
 * This is how the framebuffer base address is stored in g200 cards:
 *   * Assume @offset is the gpu_addr variable of the framebuffer object
 *   * Then addr is the number of _pixels_ (not bytes) from the start of
 *     VRAM to the first pixel we want to display. (divided by 2 for 32bit
 *     framebuffers)
 *   * addr is stored in the CRTCEXT0, CRTCC and CRTCD registers
 *      addr<20> -> CRTCEXT0<6>
 *      addr<19-16> -> CRTCEXT0<3-0>
 *      addr<15-8> -> CRTCC<7-0>
 *      addr<7-0> -> CRTCD<7-0>
 *
 *  CRTCEXT0 has to be programmed last to trigger an update and make the
 *  new addr variable take effect.
 */
static void mgag200_set_startadd(struct mga_device *mdev,
				 unsigned long offset)
{ … }

void mgag200_init_registers(struct mga_device *mdev)
{ … }

void mgag200_set_mode_regs(struct mga_device *mdev, const struct drm_display_mode *mode)
{ … }

static u8 mgag200_get_bpp_shift(const struct drm_format_info *format)
{ … }

/*
 * Calculates the HW offset value from the framebuffer's pitch. The
 * offset is a multiple of the pixel size and depends on the display
 * format.
 */
static u32 mgag200_calculate_offset(struct mga_device *mdev,
				    const struct drm_framebuffer *fb)
{ … }

static void mgag200_set_offset(struct mga_device *mdev,
			       const struct drm_framebuffer *fb)
{ … }

void mgag200_set_format_regs(struct mga_device *mdev, const struct drm_format_info *format)
{ … }

void mgag200_enable_display(struct mga_device *mdev)
{ … }

static void mgag200_disable_display(struct mga_device *mdev)
{ … }

static void mgag200_handle_damage(struct mga_device *mdev, const struct iosys_map *vmap,
				  struct drm_framebuffer *fb, struct drm_rect *clip)
{ … }

/*
 * Primary plane
 */

const uint32_t mgag200_primary_plane_formats[] = …;

const size_t mgag200_primary_plane_formats_size = …;

const uint64_t mgag200_primary_plane_fmtmods[] = …;

int mgag200_primary_plane_helper_atomic_check(struct drm_plane *plane,
					      struct drm_atomic_state *new_state)
{ … }

void mgag200_primary_plane_helper_atomic_update(struct drm_plane *plane,
						struct drm_atomic_state *old_state)
{ … }

void mgag200_primary_plane_helper_atomic_enable(struct drm_plane *plane,
						struct drm_atomic_state *state)
{ … }

void mgag200_primary_plane_helper_atomic_disable(struct drm_plane *plane,
						 struct drm_atomic_state *old_state)
{ … }

int mgag200_primary_plane_helper_get_scanout_buffer(struct drm_plane *plane,
						    struct drm_scanout_buffer *sb)
{ … }

/*
 * CRTC
 */

enum drm_mode_status mgag200_crtc_helper_mode_valid(struct drm_crtc *crtc,
						    const struct drm_display_mode *mode)
{ … }

int mgag200_crtc_helper_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *new_state)
{ … }

void mgag200_crtc_helper_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *old_state)
{ … }

void mgag200_crtc_helper_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *old_state)
{ … }

void mgag200_crtc_helper_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *old_state)
{ … }

void mgag200_crtc_reset(struct drm_crtc *crtc)
{ … }

struct drm_crtc_state *mgag200_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
{ … }

void mgag200_crtc_atomic_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *crtc_state)
{ … }

/*
 * Mode config
 */

static void mgag200_mode_config_helper_atomic_commit_tail(struct drm_atomic_state *state)
{ … }

static const struct drm_mode_config_helper_funcs mgag200_mode_config_helper_funcs = …;

/* Calculates a mode's required memory bandwidth (in KiB/sec). */
static uint32_t mgag200_calculate_mode_bandwidth(const struct drm_display_mode *mode,
						 unsigned int bits_per_pixel)
{ … }

static enum drm_mode_status mgag200_mode_config_mode_valid(struct drm_device *dev,
							   const struct drm_display_mode *mode)
{ … }

static const struct drm_mode_config_funcs mgag200_mode_config_funcs = …;

int mgag200_mode_config_init(struct mga_device *mdev, resource_size_t vram_available)
{ … }