/* * Copyright © 2014-2018 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef _V3D_DRM_H_ #define _V3D_DRM_H_ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif #define DRM_V3D_SUBMIT_CL … #define DRM_V3D_WAIT_BO … #define DRM_V3D_CREATE_BO … #define DRM_V3D_MMAP_BO … #define DRM_V3D_GET_PARAM … #define DRM_V3D_GET_BO_OFFSET … #define DRM_V3D_SUBMIT_TFU … #define DRM_V3D_SUBMIT_CSD … #define DRM_V3D_PERFMON_CREATE … #define DRM_V3D_PERFMON_DESTROY … #define DRM_V3D_PERFMON_GET_VALUES … #define DRM_V3D_SUBMIT_CPU … #define DRM_V3D_PERFMON_GET_COUNTER … #define DRM_IOCTL_V3D_SUBMIT_CL … #define DRM_IOCTL_V3D_WAIT_BO … #define DRM_IOCTL_V3D_CREATE_BO … #define DRM_IOCTL_V3D_MMAP_BO … #define DRM_IOCTL_V3D_GET_PARAM … #define DRM_IOCTL_V3D_GET_BO_OFFSET … #define DRM_IOCTL_V3D_SUBMIT_TFU … #define DRM_IOCTL_V3D_SUBMIT_CSD … #define DRM_IOCTL_V3D_PERFMON_CREATE … #define DRM_IOCTL_V3D_PERFMON_DESTROY … #define DRM_IOCTL_V3D_PERFMON_GET_VALUES … #define DRM_IOCTL_V3D_SUBMIT_CPU … #define DRM_IOCTL_V3D_PERFMON_GET_COUNTER … #define DRM_V3D_SUBMIT_CL_FLUSH_CACHE … #define DRM_V3D_SUBMIT_EXTENSION … /* struct drm_v3d_extension - ioctl extensions * * Linked-list of generic extensions where the id identify which struct is * pointed by ext_data. Therefore, DRM_V3D_EXT_ID_* is used on id to identify * the extension type. */ struct drm_v3d_extension { … }; /* struct drm_v3d_sem - wait/signal semaphore * * If binary semaphore, it only takes syncobj handle and ignores flags and * point fields. Point is defined for timeline syncobj feature. */ struct drm_v3d_sem { … }; /* Enum for each of the V3D queues. */ enum v3d_queue { … }; /** * struct drm_v3d_multi_sync - ioctl extension to add support multiples * syncobjs for commands submission. * * When an extension of DRM_V3D_EXT_ID_MULTI_SYNC id is defined, it points to * this extension to define wait and signal dependencies, instead of single * in/out sync entries on submitting commands. The field flags is used to * determine the stage to set wait dependencies. */ struct drm_v3d_multi_sync { … }; /** * struct drm_v3d_submit_cl - ioctl argument for submitting commands to the 3D * engine. * * This asks the kernel to have the GPU execute an optional binner * command list, and a render command list. * * The L1T, slice, L2C, L2T, and GCA caches will be flushed before * each CL executes. The VCD cache should be flushed (if necessary) * by the submitted CLs. The TLB writes are guaranteed to have been * flushed by the time the render done IRQ happens, which is the * trigger for out_sync. Any dirtying of cachelines by the job (only * possible using TMU writes) must be flushed by the caller using the * DRM_V3D_SUBMIT_CL_FLUSH_CACHE_FLAG flag. */ struct drm_v3d_submit_cl { … }; /** * struct drm_v3d_wait_bo - ioctl argument for waiting for * completion of the last DRM_V3D_SUBMIT_CL on a BO. * * This is useful for cases where multiple processes might be * rendering to a BO and you want to wait for all rendering to be * completed. */ struct drm_v3d_wait_bo { … }; /** * struct drm_v3d_create_bo - ioctl argument for creating V3D BOs. * * There are currently no values for the flags argument, but it may be * used in a future extension. */ struct drm_v3d_create_bo { … }; /** * struct drm_v3d_mmap_bo - ioctl argument for mapping V3D BOs. * * This doesn't actually perform an mmap. Instead, it returns the * offset you need to use in an mmap on the DRM device node. This * means that tools like valgrind end up knowing about the mapped * memory. * * There are currently no values for the flags argument, but it may be * used in a future extension. */ struct drm_v3d_mmap_bo { … }; enum drm_v3d_param { … }; struct drm_v3d_get_param { … }; /** * Returns the offset for the BO in the V3D address space for this DRM fd. * This is the same value returned by drm_v3d_create_bo, if that was called * from this DRM fd. */ struct drm_v3d_get_bo_offset { … }; struct drm_v3d_submit_tfu { … }; /* Submits a compute shader for dispatch. This job will block on any * previous compute shaders submitted on this fd, and any other * synchronization must be performed with in_sync/out_sync. */ struct drm_v3d_submit_csd { … }; /** * struct drm_v3d_indirect_csd - ioctl extension for the CPU job to create an * indirect CSD * * When an extension of DRM_V3D_EXT_ID_CPU_INDIRECT_CSD id is defined, it * points to this extension to define a indirect CSD submission. It creates a * CPU job linked to a CSD job. The CPU job waits for the indirect CSD * dependencies and, once they are signaled, it updates the CSD job config * before allowing the CSD job execution. */ struct drm_v3d_indirect_csd { … }; /** * struct drm_v3d_timestamp_query - ioctl extension for the CPU job to calculate * a timestamp query * * When an extension DRM_V3D_EXT_ID_TIMESTAMP_QUERY is defined, it points to * this extension to define a timestamp query submission. This CPU job will * calculate the timestamp query and update the query value within the * timestamp BO. Moreover, it will signal the timestamp syncobj to indicate * query availability. */ struct drm_v3d_timestamp_query { … }; /** * struct drm_v3d_reset_timestamp_query - ioctl extension for the CPU job to * reset timestamp queries * * When an extension DRM_V3D_EXT_ID_CPU_RESET_TIMESTAMP_QUERY is defined, it * points to this extension to define a reset timestamp submission. This CPU * job will reset the timestamp queries based on value offset of the first * query. Moreover, it will reset the timestamp syncobj to reset query * availability. */ struct drm_v3d_reset_timestamp_query { … }; /** * struct drm_v3d_copy_timestamp_query - ioctl extension for the CPU job to copy * query results to a buffer * * When an extension DRM_V3D_EXT_ID_CPU_COPY_TIMESTAMP_QUERY is defined, it * points to this extension to define a copy timestamp query submission. This * CPU job will copy the timestamp queries results to a BO with the offset * and stride defined in the extension. */ struct drm_v3d_copy_timestamp_query { … }; /** * struct drm_v3d_reset_performance_query - ioctl extension for the CPU job to * reset performance queries * * When an extension DRM_V3D_EXT_ID_CPU_RESET_PERFORMANCE_QUERY is defined, it * points to this extension to define a reset performance submission. This CPU * job will reset the performance queries by resetting the values of the * performance monitors. Moreover, it will reset the syncobj to reset query * availability. */ struct drm_v3d_reset_performance_query { … }; /** * struct drm_v3d_copy_performance_query - ioctl extension for the CPU job to copy * performance query results to a buffer * * When an extension DRM_V3D_EXT_ID_CPU_COPY_PERFORMANCE_QUERY is defined, it * points to this extension to define a copy performance query submission. This * CPU job will copy the performance queries results to a BO with the offset * and stride defined in the extension. */ struct drm_v3d_copy_performance_query { … }; struct drm_v3d_submit_cpu { … }; /* The performance counters index represented by this enum are deprecated and * must no longer be used. These counters are only valid for V3D 4.2. * * In order to check for performance counter information, * use DRM_IOCTL_V3D_PERFMON_GET_COUNTER. * * Don't use V3D_PERFCNT_NUM to retrieve the maximum number of performance * counters. You should use DRM_IOCTL_V3D_GET_PARAM with the following * parameter: DRM_V3D_PARAM_MAX_PERF_COUNTERS. */ enum { … }; #define DRM_V3D_MAX_PERF_COUNTERS … struct drm_v3d_perfmon_create { … }; struct drm_v3d_perfmon_destroy { … }; /* * Returns the values of the performance counters tracked by this * perfmon (as an array of ncounters u64 values). * * No implicit synchronization is performed, so the user has to * guarantee that any jobs using this perfmon have already been * completed (probably by blocking on the seqno returned by the * last exec that used the perfmon). */ struct drm_v3d_perfmon_get_values { … }; #define DRM_V3D_PERFCNT_MAX_NAME … #define DRM_V3D_PERFCNT_MAX_CATEGORY … #define DRM_V3D_PERFCNT_MAX_DESCRIPTION … /** * struct drm_v3d_perfmon_get_counter - ioctl to get the description of a * performance counter * * As userspace needs to retrieve information about the performance counters * available, this IOCTL allows users to get information about a performance * counter (name, category and description). */ struct drm_v3d_perfmon_get_counter { … }; #if defined(__cplusplus) } #endif #endif /* _V3D_DRM_H_ */
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