/* * Copyright © 2014-2015 Broadcom * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. */ #ifndef _UAPI_VC4_DRM_H_ #define _UAPI_VC4_DRM_H_ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif #define DRM_VC4_SUBMIT_CL … #define DRM_VC4_WAIT_SEQNO … #define DRM_VC4_WAIT_BO … #define DRM_VC4_CREATE_BO … #define DRM_VC4_MMAP_BO … #define DRM_VC4_CREATE_SHADER_BO … #define DRM_VC4_GET_HANG_STATE … #define DRM_VC4_GET_PARAM … #define DRM_VC4_SET_TILING … #define DRM_VC4_GET_TILING … #define DRM_VC4_LABEL_BO … #define DRM_VC4_GEM_MADVISE … #define DRM_VC4_PERFMON_CREATE … #define DRM_VC4_PERFMON_DESTROY … #define DRM_VC4_PERFMON_GET_VALUES … #define DRM_IOCTL_VC4_SUBMIT_CL … #define DRM_IOCTL_VC4_WAIT_SEQNO … #define DRM_IOCTL_VC4_WAIT_BO … #define DRM_IOCTL_VC4_CREATE_BO … #define DRM_IOCTL_VC4_MMAP_BO … #define DRM_IOCTL_VC4_CREATE_SHADER_BO … #define DRM_IOCTL_VC4_GET_HANG_STATE … #define DRM_IOCTL_VC4_GET_PARAM … #define DRM_IOCTL_VC4_SET_TILING … #define DRM_IOCTL_VC4_GET_TILING … #define DRM_IOCTL_VC4_LABEL_BO … #define DRM_IOCTL_VC4_GEM_MADVISE … #define DRM_IOCTL_VC4_PERFMON_CREATE … #define DRM_IOCTL_VC4_PERFMON_DESTROY … #define DRM_IOCTL_VC4_PERFMON_GET_VALUES … struct drm_vc4_submit_rcl_surface { … }; /** * struct drm_vc4_submit_cl - ioctl argument for submitting commands to the 3D * engine. * * Drivers typically use GPU BOs to store batchbuffers / command lists and * their associated state. However, because the VC4 lacks an MMU, we have to * do validation of memory accesses by the GPU commands. If we were to store * our commands in BOs, we'd need to do uncached readback from them to do the * validation process, which is too expensive. Instead, userspace accumulates * commands and associated state in plain memory, then the kernel copies the * data to its own address space, and then validates and stores it in a GPU * BO. */ struct drm_vc4_submit_cl { … }; /** * struct drm_vc4_wait_seqno - ioctl argument for waiting for * DRM_VC4_SUBMIT_CL completion using its returned seqno. * * timeout_ns is the timeout in nanoseconds, where "0" means "don't * block, just return the status." */ struct drm_vc4_wait_seqno { … }; /** * struct drm_vc4_wait_bo - ioctl argument for waiting for * completion of the last DRM_VC4_SUBMIT_CL on a BO. * * This is useful for cases where multiple processes might be * rendering to a BO and you want to wait for all rendering to be * completed. */ struct drm_vc4_wait_bo { … }; /** * struct drm_vc4_create_bo - ioctl argument for creating VC4 BOs. * * There are currently no values for the flags argument, but it may be * used in a future extension. */ struct drm_vc4_create_bo { … }; /** * struct drm_vc4_mmap_bo - ioctl argument for mapping VC4 BOs. * * This doesn't actually perform an mmap. Instead, it returns the * offset you need to use in an mmap on the DRM device node. This * means that tools like valgrind end up knowing about the mapped * memory. * * There are currently no values for the flags argument, but it may be * used in a future extension. */ struct drm_vc4_mmap_bo { … }; /** * struct drm_vc4_create_shader_bo - ioctl argument for creating VC4 * shader BOs. * * Since allowing a shader to be overwritten while it's also being * executed from would allow privlege escalation, shaders must be * created using this ioctl, and they can't be mmapped later. */ struct drm_vc4_create_shader_bo { … }; struct drm_vc4_get_hang_state_bo { … }; /** * struct drm_vc4_hang_state - ioctl argument for collecting state * from a GPU hang for analysis. */ struct drm_vc4_get_hang_state { … }; #define DRM_VC4_PARAM_V3D_IDENT0 … #define DRM_VC4_PARAM_V3D_IDENT1 … #define DRM_VC4_PARAM_V3D_IDENT2 … #define DRM_VC4_PARAM_SUPPORTS_BRANCHES … #define DRM_VC4_PARAM_SUPPORTS_ETC1 … #define DRM_VC4_PARAM_SUPPORTS_THREADED_FS … #define DRM_VC4_PARAM_SUPPORTS_FIXED_RCL_ORDER … #define DRM_VC4_PARAM_SUPPORTS_MADVISE … #define DRM_VC4_PARAM_SUPPORTS_PERFMON … struct drm_vc4_get_param { … }; struct drm_vc4_get_tiling { … }; struct drm_vc4_set_tiling { … }; /** * struct drm_vc4_label_bo - Attach a name to a BO for debug purposes. */ struct drm_vc4_label_bo { … }; /* * States prefixed with '__' are internal states and cannot be passed to the * DRM_IOCTL_VC4_GEM_MADVISE ioctl. */ #define VC4_MADV_WILLNEED … #define VC4_MADV_DONTNEED … #define __VC4_MADV_PURGED … #define __VC4_MADV_NOTSUPP … struct drm_vc4_gem_madvise { … }; enum { … }; #define DRM_VC4_MAX_PERF_COUNTERS … struct drm_vc4_perfmon_create { … }; struct drm_vc4_perfmon_destroy { … }; /* * Returns the values of the performance counters tracked by this * perfmon (as an array of ncounters u64 values). * * No implicit synchronization is performed, so the user has to * guarantee that any jobs using this perfmon have already been * completed (probably by blocking on the seqno returned by the * last exec that used the perfmon). */ struct drm_vc4_perfmon_get_values { … }; #if defined(__cplusplus) } #endif #endif /* _UAPI_VC4_DRM_H_ */