/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2015 Broadcom */ #ifndef _VC4_DRV_H_ #define _VC4_DRV_H_ #include <linux/debugfs.h> #include <linux/delay.h> #include <linux/of.h> #include <linux/refcount.h> #include <linux/uaccess.h> #include <drm/drm_atomic.h> #include <drm/drm_debugfs.h> #include <drm/drm_device.h> #include <drm/drm_encoder.h> #include <drm/drm_gem_dma_helper.h> #include <drm/drm_managed.h> #include <drm/drm_mm.h> #include <drm/drm_modeset_lock.h> #include <kunit/test-bug.h> #include "uapi/drm/vc4_drm.h" struct drm_device; struct drm_gem_object; extern const struct drm_driver vc4_drm_driver; extern const struct drm_driver vc5_drm_driver; /* Don't forget to update vc4_bo.c: bo_type_names[] when adding to * this. */ enum vc4_kernel_bo_type { … }; /* Performance monitor object. The perform lifetime is controlled by userspace * using perfmon related ioctls. A perfmon can be attached to a submit_cl * request, and when this is the case, HW perf counters will be activated just * before the submit_cl is submitted to the GPU and disabled when the job is * done. This way, only events related to a specific job will be counted. */ struct vc4_perfmon { … }; struct vc4_dev { … }; #define to_vc4_dev(_dev) … struct vc4_bo { … }; #define to_vc4_bo(_bo) … struct vc4_fence { … }; #define to_vc4_fence(_fence) … struct vc4_seqno_cb { … }; struct vc4_v3d { … }; struct vc4_hvs { … }; #define HVS_NUM_CHANNELS … struct vc4_hvs_state { … }; #define to_vc4_hvs_state(_state) … struct vc4_hvs_state *vc4_hvs_get_global_state(struct drm_atomic_state *state); struct vc4_hvs_state *vc4_hvs_get_old_global_state(const struct drm_atomic_state *state); struct vc4_hvs_state *vc4_hvs_get_new_global_state(const struct drm_atomic_state *state); struct vc4_plane { … }; #define to_vc4_plane(_plane) … enum vc4_scaling_mode { … }; struct vc4_plane_state { … }; #define to_vc4_plane_state(_state) … enum vc4_encoder_type { … }; struct vc4_encoder { … }; #define to_vc4_encoder(_encoder) … static inline struct drm_encoder *vc4_find_encoder_by_type(struct drm_device *drm, enum vc4_encoder_type type) { … } struct vc4_crtc_data { … }; extern const struct vc4_crtc_data vc4_txp_crtc_data; struct vc4_pv_data { … }; extern const struct vc4_pv_data bcm2835_pv0_data; extern const struct vc4_pv_data bcm2835_pv1_data; extern const struct vc4_pv_data bcm2835_pv2_data; extern const struct vc4_pv_data bcm2711_pv0_data; extern const struct vc4_pv_data bcm2711_pv1_data; extern const struct vc4_pv_data bcm2711_pv2_data; extern const struct vc4_pv_data bcm2711_pv3_data; extern const struct vc4_pv_data bcm2711_pv4_data; struct vc4_crtc { … }; #define to_vc4_crtc(_crtc) … static inline const struct vc4_crtc_data * vc4_crtc_to_vc4_crtc_data(const struct vc4_crtc *crtc) { … } static inline const struct vc4_pv_data * vc4_crtc_to_vc4_pv_data(const struct vc4_crtc *crtc) { … } struct drm_encoder *vc4_get_crtc_encoder(struct drm_crtc *crtc, struct drm_crtc_state *state); struct vc4_crtc_state { … }; #define VC4_HVS_CHANNEL_DISABLED … #define to_vc4_crtc_state(_state) … #define V3D_READ(offset) … #define V3D_WRITE(offset, val) … #define HVS_READ(offset) … #define HVS_WRITE(offset, val) … #define VC4_REG32(reg) … struct vc4_exec_info { … }; /* Per-open file private data. Any driver-specific resource that has to be * released when the DRM file is closed should be placed here. */ struct vc4_file { … }; static inline struct vc4_exec_info * vc4_first_bin_job(struct vc4_dev *vc4) { … } static inline struct vc4_exec_info * vc4_first_render_job(struct vc4_dev *vc4) { … } static inline struct vc4_exec_info * vc4_last_render_job(struct vc4_dev *vc4) { … } /** * struct vc4_texture_sample_info - saves the offsets into the UBO for texture * setup parameters. * * This will be used at draw time to relocate the reference to the texture * contents in p0, and validate that the offset combined with * width/height/stride/etc. from p1 and p2/p3 doesn't sample outside the BO. * Note that the hardware treats unprovided config parameters as 0, so not all * of them need to be set up for every texure sample, and we'll store ~0 as * the offset to mark the unused ones. * * See the VC4 3D architecture guide page 41 ("Texture and Memory Lookup Unit * Setup") for definitions of the texture parameters. */ struct vc4_texture_sample_info { … }; /** * struct vc4_validated_shader_info - information about validated shaders that * needs to be used from command list validation. * * For a given shader, each time a shader state record references it, we need * to verify that the shader doesn't read more uniforms than the shader state * record's uniform BO pointer can provide, and we need to apply relocations * and validate the shader state record's uniforms that define the texture * samples. */ struct vc4_validated_shader_info { … }; /** * __wait_for - magic wait macro * * Macro to help avoid open coding check/wait/timeout patterns. Note that it's * important that we check the condition again after having timed out, since the * timeout could be due to preemption or similar and we've never had a chance to * check the condition before the timeout. */ #define __wait_for(OP, COND, US, Wmin, Wmax) … #define _wait_for(COND, US, Wmin, Wmax) … #define wait_for(COND, MS) … /* vc4_bo.c */ struct drm_gem_object *vc4_create_object(struct drm_device *dev, size_t size); struct vc4_bo *vc4_bo_create(struct drm_device *dev, size_t size, bool from_cache, enum vc4_kernel_bo_type type); int vc4_bo_dumb_create(struct drm_file *file_priv, struct drm_device *dev, struct drm_mode_create_dumb *args); int vc4_create_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_create_shader_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_mmap_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_set_tiling_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_get_tiling_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_get_hang_state_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_label_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_bo_cache_init(struct drm_device *dev); int vc4_bo_inc_usecnt(struct vc4_bo *bo); void vc4_bo_dec_usecnt(struct vc4_bo *bo); void vc4_bo_add_to_purgeable_pool(struct vc4_bo *bo); void vc4_bo_remove_from_purgeable_pool(struct vc4_bo *bo); int vc4_bo_debugfs_init(struct drm_minor *minor); /* vc4_crtc.c */ extern struct platform_driver vc4_crtc_driver; int vc4_crtc_disable_at_boot(struct drm_crtc *crtc); int __vc4_crtc_init(struct drm_device *drm, struct platform_device *pdev, struct vc4_crtc *vc4_crtc, const struct vc4_crtc_data *data, struct drm_plane *primary_plane, const struct drm_crtc_funcs *crtc_funcs, const struct drm_crtc_helper_funcs *crtc_helper_funcs, bool feeds_txp); int vc4_crtc_init(struct drm_device *drm, struct platform_device *pdev, struct vc4_crtc *vc4_crtc, const struct vc4_crtc_data *data, const struct drm_crtc_funcs *crtc_funcs, const struct drm_crtc_helper_funcs *crtc_helper_funcs, bool feeds_txp); int vc4_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, uint32_t flags, struct drm_modeset_acquire_ctx *ctx); int vc4_crtc_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state); struct drm_crtc_state *vc4_crtc_duplicate_state(struct drm_crtc *crtc); void vc4_crtc_destroy_state(struct drm_crtc *crtc, struct drm_crtc_state *state); void vc4_crtc_reset(struct drm_crtc *crtc); void vc4_crtc_handle_vblank(struct vc4_crtc *crtc); void vc4_crtc_send_vblank(struct drm_crtc *crtc); int vc4_crtc_late_register(struct drm_crtc *crtc); void vc4_crtc_get_margins(struct drm_crtc_state *state, unsigned int *left, unsigned int *right, unsigned int *top, unsigned int *bottom); /* vc4_debugfs.c */ void vc4_debugfs_init(struct drm_minor *minor); #ifdef CONFIG_DEBUG_FS void vc4_debugfs_add_regset32(struct drm_device *drm, const char *filename, struct debugfs_regset32 *regset); #else static inline void vc4_debugfs_add_regset32(struct drm_device *drm, const char *filename, struct debugfs_regset32 *regset) {} #endif /* vc4_drv.c */ void __iomem *vc4_ioremap_regs(struct platform_device *dev, int index); int vc4_dumb_fixup_args(struct drm_mode_create_dumb *args); /* vc4_dpi.c */ extern struct platform_driver vc4_dpi_driver; /* vc4_dsi.c */ extern struct platform_driver vc4_dsi_driver; /* vc4_fence.c */ extern const struct dma_fence_ops vc4_fence_ops; /* vc4_gem.c */ int vc4_gem_init(struct drm_device *dev); int vc4_submit_cl_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_wait_seqno_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_wait_bo_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); void vc4_submit_next_bin_job(struct drm_device *dev); void vc4_submit_next_render_job(struct drm_device *dev); void vc4_move_job_to_render(struct drm_device *dev, struct vc4_exec_info *exec); int vc4_wait_for_seqno(struct drm_device *dev, uint64_t seqno, uint64_t timeout_ns, bool interruptible); void vc4_job_handle_completed(struct vc4_dev *vc4); int vc4_queue_seqno_cb(struct drm_device *dev, struct vc4_seqno_cb *cb, uint64_t seqno, void (*func)(struct vc4_seqno_cb *cb)); int vc4_gem_madvise_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); /* vc4_hdmi.c */ extern struct platform_driver vc4_hdmi_driver; /* vc4_vec.c */ extern struct platform_driver vc4_vec_driver; /* vc4_txp.c */ extern struct platform_driver vc4_txp_driver; /* vc4_irq.c */ void vc4_irq_enable(struct drm_device *dev); void vc4_irq_disable(struct drm_device *dev); int vc4_irq_install(struct drm_device *dev, int irq); void vc4_irq_uninstall(struct drm_device *dev); void vc4_irq_reset(struct drm_device *dev); /* vc4_hvs.c */ extern struct platform_driver vc4_hvs_driver; struct vc4_hvs *__vc4_hvs_alloc(struct vc4_dev *vc4, struct platform_device *pdev); void vc4_hvs_stop_channel(struct vc4_hvs *hvs, unsigned int output); int vc4_hvs_get_fifo_from_output(struct vc4_hvs *hvs, unsigned int output); u8 vc4_hvs_get_fifo_frame_count(struct vc4_hvs *hvs, unsigned int fifo); int vc4_hvs_atomic_check(struct drm_crtc *crtc, struct drm_atomic_state *state); void vc4_hvs_atomic_begin(struct drm_crtc *crtc, struct drm_atomic_state *state); void vc4_hvs_atomic_enable(struct drm_crtc *crtc, struct drm_atomic_state *state); void vc4_hvs_atomic_disable(struct drm_crtc *crtc, struct drm_atomic_state *state); void vc4_hvs_atomic_flush(struct drm_crtc *crtc, struct drm_atomic_state *state); void vc4_hvs_dump_state(struct vc4_hvs *hvs); void vc4_hvs_unmask_underrun(struct vc4_hvs *hvs, int channel); void vc4_hvs_mask_underrun(struct vc4_hvs *hvs, int channel); int vc4_hvs_debugfs_init(struct drm_minor *minor); /* vc4_kms.c */ int vc4_kms_load(struct drm_device *dev); /* vc4_plane.c */ struct drm_plane *vc4_plane_init(struct drm_device *dev, enum drm_plane_type type, uint32_t possible_crtcs); int vc4_plane_create_additional_planes(struct drm_device *dev); u32 vc4_plane_write_dlist(struct drm_plane *plane, u32 __iomem *dlist); u32 vc4_plane_dlist_size(const struct drm_plane_state *state); void vc4_plane_async_set_fb(struct drm_plane *plane, struct drm_framebuffer *fb); /* vc4_v3d.c */ extern struct platform_driver vc4_v3d_driver; extern const struct of_device_id vc4_v3d_dt_match[]; int vc4_v3d_get_bin_slot(struct vc4_dev *vc4); int vc4_v3d_bin_bo_get(struct vc4_dev *vc4, bool *used); void vc4_v3d_bin_bo_put(struct vc4_dev *vc4); int vc4_v3d_pm_get(struct vc4_dev *vc4); void vc4_v3d_pm_put(struct vc4_dev *vc4); int vc4_v3d_debugfs_init(struct drm_minor *minor); /* vc4_validate.c */ int vc4_validate_bin_cl(struct drm_device *dev, void *validated, void *unvalidated, struct vc4_exec_info *exec); int vc4_validate_shader_recs(struct drm_device *dev, struct vc4_exec_info *exec); struct drm_gem_dma_object *vc4_use_bo(struct vc4_exec_info *exec, uint32_t hindex); int vc4_get_rcl(struct drm_device *dev, struct vc4_exec_info *exec); bool vc4_check_tex_size(struct vc4_exec_info *exec, struct drm_gem_dma_object *fbo, uint32_t offset, uint8_t tiling_format, uint32_t width, uint32_t height, uint8_t cpp); /* vc4_validate_shader.c */ struct vc4_validated_shader_info * vc4_validate_shader(struct drm_gem_dma_object *shader_obj); /* vc4_perfmon.c */ void vc4_perfmon_get(struct vc4_perfmon *perfmon); void vc4_perfmon_put(struct vc4_perfmon *perfmon); void vc4_perfmon_start(struct vc4_dev *vc4, struct vc4_perfmon *perfmon); void vc4_perfmon_stop(struct vc4_dev *vc4, struct vc4_perfmon *perfmon, bool capture); struct vc4_perfmon *vc4_perfmon_find(struct vc4_file *vc4file, int id); void vc4_perfmon_open_file(struct vc4_file *vc4file); void vc4_perfmon_close_file(struct vc4_file *vc4file); int vc4_perfmon_create_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_perfmon_destroy_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); int vc4_perfmon_get_values_ioctl(struct drm_device *dev, void *data, struct drm_file *file_priv); #endif /* _VC4_DRV_H_ */
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