linux/drivers/gpu/drm/nouveau/nvkm/subdev/clk/gk20a.c

/*
 * Copyright (c) 2014-2016, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 *
 * Shamelessly ripped off from ChromeOS's gk20a/clk_pllg.c
 *
 */
#include "priv.h"
#include "gk20a.h"

#include <core/tegra.h>
#include <subdev/timer.h>

static const u8 _pl_to_div[] = …;

static u32 pl_to_div(u32 pl)
{ … }

static u32 div_to_pl(u32 div)
{ … }

static const struct gk20a_clk_pllg_params gk20a_pllg_params = …;

void
gk20a_pllg_read_mnp(struct gk20a_clk *clk, struct gk20a_pll *pll)
{ … }

void
gk20a_pllg_write_mnp(struct gk20a_clk *clk, const struct gk20a_pll *pll)
{ … }

u32
gk20a_pllg_calc_rate(struct gk20a_clk *clk, struct gk20a_pll *pll)
{ … }

int
gk20a_pllg_calc_mnp(struct gk20a_clk *clk, unsigned long rate,
		    struct gk20a_pll *pll)
{ … }

static int
gk20a_pllg_slide(struct gk20a_clk *clk, u32 n)
{ … }

static int
gk20a_pllg_enable(struct gk20a_clk *clk)
{ … }

static void
gk20a_pllg_disable(struct gk20a_clk *clk)
{ … }

static int
gk20a_pllg_program_mnp(struct gk20a_clk *clk, const struct gk20a_pll *pll)
{ … }

static int
gk20a_pllg_program_mnp_slide(struct gk20a_clk *clk, const struct gk20a_pll *pll)
{ … }

static struct nvkm_pstate
gk20a_pstates[] = …;

int
gk20a_clk_read(struct nvkm_clk *base, enum nv_clk_src src)
{ … }

int
gk20a_clk_calc(struct nvkm_clk *base, struct nvkm_cstate *cstate)
{ … }

int
gk20a_clk_prog(struct nvkm_clk *base)
{ … }

void
gk20a_clk_tidy(struct nvkm_clk *base)
{ … }

int
gk20a_clk_setup_slide(struct gk20a_clk *clk)
{ … }

void
gk20a_clk_fini(struct nvkm_clk *base)
{ … }

static int
gk20a_clk_init(struct nvkm_clk *base)
{ … }

static const struct nvkm_clk_func
gk20a_clk = …;

int
gk20a_clk_ctor(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
	       const struct nvkm_clk_func *func, const struct gk20a_clk_pllg_params *params,
	       struct gk20a_clk *clk)
{ … }

int
gk20a_clk_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
	      struct nvkm_clk **pclk)
{ … }