/* SPDX-License-Identifier: GPL-2.0 */ /* * Defines macros and constants for Renesas RZ/N1 pin controller pin * muxing functions. */ #ifndef __DT_BINDINGS_RZN1_PINCTRL_H #define __DT_BINDINGS_RZN1_PINCTRL_H #define RZN1_PINMUX(_gpio, _func) … /* * Given the different levels of muxing on the SoC, it was decided to * 'linearize' them into one numerical space. So mux level 1, 2 and the MDIO * muxes are all represented by one single value. * * You can derive the hardware value pretty easily too, as * 0...9 are Level 1 * 10...71 are Level 2. The Level 2 mux will be set to this * value - RZN1_FUNC_L2_OFFSET, and the Level 1 mux will be * set accordingly. * 72...103 are for the 2 MDIO muxes. */ #define RZN1_FUNC_HIGHZ … #define RZN1_FUNC_0L … #define RZN1_FUNC_CLK_ETH_MII_RGMII_RMII … #define RZN1_FUNC_CLK_ETH_NAND … #define RZN1_FUNC_QSPI … #define RZN1_FUNC_SDIO … #define RZN1_FUNC_LCD … #define RZN1_FUNC_LCD_E … #define RZN1_FUNC_MSEBIM … #define RZN1_FUNC_MSEBIS … #define RZN1_FUNC_L2_OFFSET … #define RZN1_FUNC_HIGHZ1 … #define RZN1_FUNC_ETHERCAT … #define RZN1_FUNC_SERCOS3 … #define RZN1_FUNC_SDIO_E … #define RZN1_FUNC_ETH_MDIO … #define RZN1_FUNC_ETH_MDIO_E1 … #define RZN1_FUNC_USB … #define RZN1_FUNC_MSEBIM_E … #define RZN1_FUNC_MSEBIS_E … #define RZN1_FUNC_RSV … #define RZN1_FUNC_RSV_E … #define RZN1_FUNC_RSV_E1 … #define RZN1_FUNC_UART0_I … #define RZN1_FUNC_UART0_I_E … #define RZN1_FUNC_UART1_I … #define RZN1_FUNC_UART1_I_E … #define RZN1_FUNC_UART2_I … #define RZN1_FUNC_UART2_I_E … #define RZN1_FUNC_UART0 … #define RZN1_FUNC_UART0_E … #define RZN1_FUNC_UART1 … #define RZN1_FUNC_UART1_E … #define RZN1_FUNC_UART2 … #define RZN1_FUNC_UART2_E … #define RZN1_FUNC_UART3 … #define RZN1_FUNC_UART3_E … #define RZN1_FUNC_UART4 … #define RZN1_FUNC_UART4_E … #define RZN1_FUNC_UART5 … #define RZN1_FUNC_UART5_E … #define RZN1_FUNC_UART6 … #define RZN1_FUNC_UART6_E … #define RZN1_FUNC_UART7 … #define RZN1_FUNC_UART7_E … #define RZN1_FUNC_SPI0_M … #define RZN1_FUNC_SPI0_M_E … #define RZN1_FUNC_SPI1_M … #define RZN1_FUNC_SPI1_M_E … #define RZN1_FUNC_SPI2_M … #define RZN1_FUNC_SPI2_M_E … #define RZN1_FUNC_SPI3_M … #define RZN1_FUNC_SPI3_M_E … #define RZN1_FUNC_SPI4_S … #define RZN1_FUNC_SPI4_S_E … #define RZN1_FUNC_SPI5_S … #define RZN1_FUNC_SPI5_S_E … #define RZN1_FUNC_SGPIO0_M … #define RZN1_FUNC_SGPIO1_M … #define RZN1_FUNC_GPIO … #define RZN1_FUNC_CAN … #define RZN1_FUNC_I2C … #define RZN1_FUNC_SAFE … #define RZN1_FUNC_PTO_PWM … #define RZN1_FUNC_PTO_PWM1 … #define RZN1_FUNC_PTO_PWM2 … #define RZN1_FUNC_PTO_PWM3 … #define RZN1_FUNC_PTO_PWM4 … #define RZN1_FUNC_DELTA_SIGMA … #define RZN1_FUNC_SGPIO2_M … #define RZN1_FUNC_SGPIO3_M … #define RZN1_FUNC_SGPIO4_S … #define RZN1_FUNC_MAC_MTIP_SWITCH … #define RZN1_FUNC_MDIO_OFFSET … /* These are MDIO0 peripherals for the RZN1_FUNC_ETH_MDIO function */ #define RZN1_FUNC_MDIO0_HIGHZ … #define RZN1_FUNC_MDIO0_GMAC0 … #define RZN1_FUNC_MDIO0_GMAC1 … #define RZN1_FUNC_MDIO0_ECAT … #define RZN1_FUNC_MDIO0_S3_MDIO0 … #define RZN1_FUNC_MDIO0_S3_MDIO1 … #define RZN1_FUNC_MDIO0_HWRTOS … #define RZN1_FUNC_MDIO0_SWITCH … /* These are MDIO0 peripherals for the RZN1_FUNC_ETH_MDIO_E1 function */ #define RZN1_FUNC_MDIO0_E1_HIGHZ … #define RZN1_FUNC_MDIO0_E1_GMAC0 … #define RZN1_FUNC_MDIO0_E1_GMAC1 … #define RZN1_FUNC_MDIO0_E1_ECAT … #define RZN1_FUNC_MDIO0_E1_S3_MDIO0 … #define RZN1_FUNC_MDIO0_E1_S3_MDIO1 … #define RZN1_FUNC_MDIO0_E1_HWRTOS … #define RZN1_FUNC_MDIO0_E1_SWITCH … /* These are MDIO1 peripherals for the RZN1_FUNC_ETH_MDIO function */ #define RZN1_FUNC_MDIO1_HIGHZ … #define RZN1_FUNC_MDIO1_GMAC0 … #define RZN1_FUNC_MDIO1_GMAC1 … #define RZN1_FUNC_MDIO1_ECAT … #define RZN1_FUNC_MDIO1_S3_MDIO0 … #define RZN1_FUNC_MDIO1_S3_MDIO1 … #define RZN1_FUNC_MDIO1_HWRTOS … #define RZN1_FUNC_MDIO1_SWITCH … /* These are MDIO1 peripherals for the RZN1_FUNC_ETH_MDIO_E1 function */ #define RZN1_FUNC_MDIO1_E1_HIGHZ … #define RZN1_FUNC_MDIO1_E1_GMAC0 … #define RZN1_FUNC_MDIO1_E1_GMAC1 … #define RZN1_FUNC_MDIO1_E1_ECAT … #define RZN1_FUNC_MDIO1_E1_S3_MDIO0 … #define RZN1_FUNC_MDIO1_E1_S3_MDIO1 … #define RZN1_FUNC_MDIO1_E1_HWRTOS … #define RZN1_FUNC_MDIO1_E1_SWITCH … #define RZN1_FUNC_MAX … #endif /* __DT_BINDINGS_RZN1_PINCTRL_H */
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