// SPDX-License-Identifier: GPL-2.0+ // // Exynos specific support for Samsung pinctrl/gpiolib driver with eint support. // // Copyright (c) 2012 Samsung Electronics Co., Ltd. // http://www.samsung.com // Copyright (c) 2012 Linaro Ltd // http://www.linaro.org // // Author: Thomas Abraham <[email protected]> // // This file contains the Samsung Exynos specific information required by the // the Samsung pinctrl/gpiolib driver. It also includes the implementation of // external gpio and wakeup interrupt support. #include <linux/device.h> #include <linux/of_address.h> #include <linux/slab.h> #include <linux/err.h> #include <linux/soc/samsung/exynos-regs-pmu.h> #include "pinctrl-samsung.h" #include "pinctrl-exynos.h" static const struct samsung_pin_bank_type bank_type_off = …; static const struct samsung_pin_bank_type bank_type_alive = …; /* Retention control for S5PV210 are located at the end of clock controller */ #define S5P_OTHERS … #define S5P_OTHERS_RET_IO … #define S5P_OTHERS_RET_CF … #define S5P_OTHERS_RET_MMC … #define S5P_OTHERS_RET_UART … static void s5pv210_retention_disable(struct samsung_pinctrl_drv_data *drvdata) { … } static struct samsung_retention_ctrl * s5pv210_retention_init(struct samsung_pinctrl_drv_data *drvdata, const struct samsung_retention_data *data) { … } static const struct samsung_retention_data s5pv210_retention_data __initconst = …; /* pin banks of s5pv210 pin-controller */ static const struct samsung_pin_bank_data s5pv210_pin_bank[] __initconst = …; static const struct samsung_pin_ctrl s5pv210_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data s5pv210_of_data __initconst = …; /* Pad retention control code for accessing PMU regmap */ static atomic_t exynos_shared_retention_refcnt; /* pin banks of exynos3250 pin-controller 0 */ static const struct samsung_pin_bank_data exynos3250_pin_banks0[] __initconst = …; /* pin banks of exynos3250 pin-controller 1 */ static const struct samsung_pin_bank_data exynos3250_pin_banks1[] __initconst = …; /* * PMU pad retention groups for Exynos3250 doesn't match pin banks, so handle * them all together */ static const u32 exynos3250_retention_regs[] = …; static const struct samsung_retention_data exynos3250_retention_data __initconst = …; /* * Samsung pinctrl driver data for Exynos3250 SoC. Exynos3250 SoC includes * two gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos3250_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos3250_of_data __initconst = …; /* pin banks of exynos4210 pin-controller 0 */ static const struct samsung_pin_bank_data exynos4210_pin_banks0[] __initconst = …; /* pin banks of exynos4210 pin-controller 1 */ static const struct samsung_pin_bank_data exynos4210_pin_banks1[] __initconst = …; /* pin banks of exynos4210 pin-controller 2 */ static const struct samsung_pin_bank_data exynos4210_pin_banks2[] __initconst = …; /* PMU pad retention groups registers for Exynos4 (without audio) */ static const u32 exynos4_retention_regs[] = …; static const struct samsung_retention_data exynos4_retention_data __initconst = …; /* PMU retention control for audio pins can be tied to audio pin bank */ static const u32 exynos4_audio_retention_regs[] = …; static const struct samsung_retention_data exynos4_audio_retention_data __initconst = …; /* * Samsung pinctrl driver data for Exynos4210 SoC. Exynos4210 SoC includes * three gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos4210_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos4210_of_data __initconst = …; /* pin banks of exynos4x12 pin-controller 0 */ static const struct samsung_pin_bank_data exynos4x12_pin_banks0[] __initconst = …; /* pin banks of exynos4x12 pin-controller 1 */ static const struct samsung_pin_bank_data exynos4x12_pin_banks1[] __initconst = …; /* pin banks of exynos4x12 pin-controller 2 */ static const struct samsung_pin_bank_data exynos4x12_pin_banks2[] __initconst = …; /* pin banks of exynos4x12 pin-controller 3 */ static const struct samsung_pin_bank_data exynos4x12_pin_banks3[] __initconst = …; /* * Samsung pinctrl driver data for Exynos4x12 SoC. Exynos4x12 SoC includes * four gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos4x12_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos4x12_of_data __initconst = …; /* pin banks of exynos5250 pin-controller 0 */ static const struct samsung_pin_bank_data exynos5250_pin_banks0[] __initconst = …; /* pin banks of exynos5250 pin-controller 1 */ static const struct samsung_pin_bank_data exynos5250_pin_banks1[] __initconst = …; /* pin banks of exynos5250 pin-controller 2 */ static const struct samsung_pin_bank_data exynos5250_pin_banks2[] __initconst = …; /* pin banks of exynos5250 pin-controller 3 */ static const struct samsung_pin_bank_data exynos5250_pin_banks3[] __initconst = …; /* * Samsung pinctrl driver data for Exynos5250 SoC. Exynos5250 SoC includes * four gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos5250_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos5250_of_data __initconst = …; /* pin banks of exynos5260 pin-controller 0 */ static const struct samsung_pin_bank_data exynos5260_pin_banks0[] __initconst = …; /* pin banks of exynos5260 pin-controller 1 */ static const struct samsung_pin_bank_data exynos5260_pin_banks1[] __initconst = …; /* pin banks of exynos5260 pin-controller 2 */ static const struct samsung_pin_bank_data exynos5260_pin_banks2[] __initconst = …; /* * Samsung pinctrl driver data for Exynos5260 SoC. Exynos5260 SoC includes * three gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos5260_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos5260_of_data __initconst = …; /* pin banks of exynos5410 pin-controller 0 */ static const struct samsung_pin_bank_data exynos5410_pin_banks0[] __initconst = …; /* pin banks of exynos5410 pin-controller 1 */ static const struct samsung_pin_bank_data exynos5410_pin_banks1[] __initconst = …; /* pin banks of exynos5410 pin-controller 2 */ static const struct samsung_pin_bank_data exynos5410_pin_banks2[] __initconst = …; /* pin banks of exynos5410 pin-controller 3 */ static const struct samsung_pin_bank_data exynos5410_pin_banks3[] __initconst = …; /* * Samsung pinctrl driver data for Exynos5410 SoC. Exynos5410 SoC includes * four gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos5410_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos5410_of_data __initconst = …; /* pin banks of exynos5420 pin-controller 0 */ static const struct samsung_pin_bank_data exynos5420_pin_banks0[] __initconst = …; /* pin banks of exynos5420 pin-controller 1 */ static const struct samsung_pin_bank_data exynos5420_pin_banks1[] __initconst = …; /* pin banks of exynos5420 pin-controller 2 */ static const struct samsung_pin_bank_data exynos5420_pin_banks2[] __initconst = …; /* pin banks of exynos5420 pin-controller 3 */ static const struct samsung_pin_bank_data exynos5420_pin_banks3[] __initconst = …; /* pin banks of exynos5420 pin-controller 4 */ static const struct samsung_pin_bank_data exynos5420_pin_banks4[] __initconst = …; /* PMU pad retention groups registers for Exynos5420 (without audio) */ static const u32 exynos5420_retention_regs[] = …; static const struct samsung_retention_data exynos5420_retention_data __initconst = …; /* * Samsung pinctrl driver data for Exynos5420 SoC. Exynos5420 SoC includes * four gpio/pin-mux/pinconfig controllers. */ static const struct samsung_pin_ctrl exynos5420_pin_ctrl[] __initconst = …; const struct samsung_pinctrl_of_match_data exynos5420_of_data __initconst = …;
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