linux/drivers/gpu/drm/nouveau/nvkm/engine/disp/vga.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include <subdev/vga.h>

u8
nvkm_rdport(struct nvkm_device *device, int head, u16 port)
{}

void
nvkm_wrport(struct nvkm_device *device, int head, u16 port, u8 data)
{}

u8
nvkm_rdvgas(struct nvkm_device *device, int head, u8 index)
{}

void
nvkm_wrvgas(struct nvkm_device *device, int head, u8 index, u8 value)
{}

u8
nvkm_rdvgag(struct nvkm_device *device, int head, u8 index)
{}

void
nvkm_wrvgag(struct nvkm_device *device, int head, u8 index, u8 value)
{}

u8
nvkm_rdvgac(struct nvkm_device *device, int head, u8 index)
{}

void
nvkm_wrvgac(struct nvkm_device *device, int head, u8 index, u8 value)
{}

u8
nvkm_rdvgai(struct nvkm_device *device, int head, u16 port, u8 index)
{}

void
nvkm_wrvgai(struct nvkm_device *device, int head, u16 port, u8 index, u8 value)
{}

bool
nvkm_lockvgac(struct nvkm_device *device, bool lock)
{}

/* CR44 takes values 0 (head A), 3 (head B) and 4 (heads tied)
 * it affects only the 8 bit vga io regs, which we access using mmio at
 * 0xc{0,2}3c*, 0x60{1,3}3*, and 0x68{1,3}3d*
 * in general, the set value of cr44 does not matter: reg access works as
 * expected and values can be set for the appropriate head by using a 0x2000
 * offset as required
 * however:
 * a) pre nv40, the head B range of PRMVIO regs at 0xc23c* was not exposed and
 *    cr44 must be set to 0 or 3 for accessing values on the correct head
 *    through the common 0xc03c* addresses
 * b) in tied mode (4) head B is programmed to the values set on head A, and
 *    access using the head B addresses can have strange results, ergo we leave
 *    tied mode in init once we know to what cr44 should be restored on exit
 *
 * the owner parameter is slightly abused:
 * 0 and 1 are treated as head values and so the set value is (owner * 3)
 * other values are treated as literal values to set
 */
u8
nvkm_rdvgaowner(struct nvkm_device *device)
{}

void
nvkm_wrvgaowner(struct nvkm_device *device, u8 select)
{}