linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "priv.h"
#include "cgrp.h"
#include "chan.h"
#include "chid.h"
#include "runl.h"

#include "regsnv04.h"

#include <core/ramht.h>
#include <subdev/instmem.h>
#include <subdev/mc.h>
#include <subdev/timer.h>
#include <engine/sw.h>

#include <nvif/class.h>

void
nv04_chan_stop(struct nvkm_chan *chan)
{ … }

void
nv04_chan_start(struct nvkm_chan *chan)
{ … }

void
nv04_chan_ramfc_clear(struct nvkm_chan *chan)
{ … }

static int
nv04_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
{ … }

static const struct nvkm_chan_func_ramfc
nv04_chan_ramfc = …;

const struct nvkm_chan_func_userd
nv04_chan_userd = …;

const struct nvkm_chan_func_inst
nv04_chan_inst = …;

static const struct nvkm_chan_func
nv04_chan = …;

const struct nvkm_cgrp_func
nv04_cgrp = …;

void
nv04_eobj_ramht_del(struct nvkm_chan *chan, int hash)
{ … }

static int
nv04_eobj_ramht_add(struct nvkm_engn *engn, struct nvkm_object *eobj, struct nvkm_chan *chan)
{ … }

const struct nvkm_engn_func
nv04_engn = …;

void
nv04_fifo_pause(struct nvkm_fifo *fifo, unsigned long *pflags)
__acquires(fifo->lock)
{ … }

void
nv04_fifo_start(struct nvkm_fifo *fifo, unsigned long *pflags)
__releases(fifo->lock)
{ … }

const struct nvkm_runl_func
nv04_runl = …;

static const char *
nv_dma_state_err(u32 state)
{ … }

static bool
nv04_fifo_swmthd(struct nvkm_device *device, u32 chid, u32 addr, u32 data)
{ … }

static void
nv04_fifo_intr_cache_error(struct nvkm_fifo *fifo, u32 chid, u32 get)
{ … }

static void
nv04_fifo_intr_dma_pusher(struct nvkm_fifo *fifo, u32 chid)
{ … }

irqreturn_t
nv04_fifo_intr(struct nvkm_inth *inth)
{ … }

void
nv04_fifo_init(struct nvkm_fifo *fifo)
{ … }

int
nv04_fifo_runl_ctor(struct nvkm_fifo *fifo)
{ … }

int
nv04_fifo_chid_ctor(struct nvkm_fifo *fifo, int nr)
{ … }

static int
nv04_fifo_chid_nr(struct nvkm_fifo *fifo)
{ … }

static const struct nvkm_fifo_func
nv04_fifo = …;

int
nv04_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
	      struct nvkm_fifo **pfifo)
{ … }