linux/drivers/gpu/drm/nouveau/nvkm/engine/fifo/gf100.c

/*
 * Copyright 2012 Red Hat Inc.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 * OTHER DEALINGS IN THE SOFTWARE.
 *
 * Authors: Ben Skeggs
 */
#include "priv.h"
#include "cgrp.h"
#include "chan.h"
#include "chid.h"
#include "runl.h"
#include "runq.h"

#include <core/gpuobj.h>
#include <subdev/bar.h>
#include <subdev/fault.h>
#include <subdev/mc.h>
#include <subdev/mmu.h>
#include <engine/sw.h>

#include <nvif/class.h>

void
gf100_chan_preempt(struct nvkm_chan *chan)
{ … }

static void
gf100_chan_stop(struct nvkm_chan *chan)
{ … }

static void
gf100_chan_start(struct nvkm_chan *chan)
{ … }

static void gf100_fifo_intr_engine(struct nvkm_fifo *);

static void
gf100_chan_unbind(struct nvkm_chan *chan)
{ … }

static void
gf100_chan_bind(struct nvkm_chan *chan)
{ … }

static int
gf100_chan_ramfc_write(struct nvkm_chan *chan, u64 offset, u64 length, u32 devm, bool priv)
{ … }

static const struct nvkm_chan_func_ramfc
gf100_chan_ramfc = …;

void
gf100_chan_userd_clear(struct nvkm_chan *chan)
{ … }

static const struct nvkm_chan_func_userd
gf100_chan_userd = …;

const struct nvkm_chan_func_inst
gf100_chan_inst = …;

static const struct nvkm_chan_func
gf100_chan = …;

static void
gf100_ectx_bind(struct nvkm_engn *engn, struct nvkm_cctx *cctx, struct nvkm_chan *chan)
{ … }

static int
gf100_ectx_ctor(struct nvkm_engn *engn, struct nvkm_vctx *vctx)
{ … }

bool
gf100_engn_mmu_fault_triggered(struct nvkm_engn *engn)
{ … }

void
gf100_engn_mmu_fault_trigger(struct nvkm_engn *engn)
{ … }

/*TODO: clean all this up. */
struct gf100_engn_status { … };

static void
gf100_engn_status(struct nvkm_engn *engn, struct gf100_engn_status *status)
{ … }

static int
gf100_engn_cxid(struct nvkm_engn *engn, bool *cgid)
{ … }

static bool
gf100_engn_chsw(struct nvkm_engn *engn)
{ … }

static const struct nvkm_engn_func
gf100_engn = …;

const struct nvkm_engn_func
gf100_engn_sw = …;

static const struct nvkm_bitfield
gf100_runq_intr_0_names[] = …;

bool
gf100_runq_intr(struct nvkm_runq *runq, struct nvkm_runl *null)
{ … }

void
gf100_runq_init(struct nvkm_runq *runq)
{ … }

static const struct nvkm_runq_func
gf100_runq = …;

bool
gf100_runl_preempt_pending(struct nvkm_runl *runl)
{ … }

static void
gf100_runl_fault_clear(struct nvkm_runl *runl)
{ … }

static void
gf100_runl_allow(struct nvkm_runl *runl, u32 engm)
{ … }

static void
gf100_runl_block(struct nvkm_runl *runl, u32 engm)
{ … }

static bool
gf100_runl_pending(struct nvkm_runl *runl)
{ … }

static void
gf100_runl_commit(struct nvkm_runl *runl, struct nvkm_memory *memory, u32 start, int count)
{ … }

static void
gf100_runl_insert_chan(struct nvkm_chan *chan, struct nvkm_memory *memory, u64 offset)
{ … }

static const struct nvkm_runl_func
gf100_runl = …;

static void
gf100_fifo_nonstall_allow(struct nvkm_event *event, int type, int index)
{ … }

static void
gf100_fifo_nonstall_block(struct nvkm_event *event, int type, int index)
{ … }

const struct nvkm_event_func
gf100_fifo_nonstall = …;

static const struct nvkm_enum
gf100_fifo_mmu_fault_engine[] = …;

static const struct nvkm_enum
gf100_fifo_mmu_fault_reason[] = …;

static const struct nvkm_enum
gf100_fifo_mmu_fault_hubclient[] = …;

static const struct nvkm_enum
gf100_fifo_mmu_fault_gpcclient[] = …;

const struct nvkm_enum
gf100_fifo_mmu_fault_access[] = …;

void
gf100_fifo_mmu_fault_recover(struct nvkm_fifo *fifo, struct nvkm_fault_data *info)
{ … }

static const struct nvkm_fifo_func_mmu_fault
gf100_fifo_mmu_fault = …;

void
gf100_fifo_intr_ctxsw_timeout(struct nvkm_fifo *fifo, u32 engm)
{ … }

static void
gf100_fifo_intr_sched_ctxsw(struct nvkm_fifo *fifo)
{ … }

static const struct nvkm_enum
gf100_fifo_intr_sched_names[] = …;

void
gf100_fifo_intr_sched(struct nvkm_fifo *fifo)
{ … }

void
gf100_fifo_intr_mmu_fault_unit(struct nvkm_fifo *fifo, int unit)
{ … }

void
gf100_fifo_intr_mmu_fault(struct nvkm_fifo *fifo)
{ … }

bool
gf100_fifo_intr_pbdma(struct nvkm_fifo *fifo)
{ … }

static void
gf100_fifo_intr_runlist(struct nvkm_fifo *fifo)
{ … }

static void
gf100_fifo_intr_engine_unit(struct nvkm_fifo *fifo, int engn)
{ … }

static void
gf100_fifo_intr_engine(struct nvkm_fifo *fifo)
{ … }

static irqreturn_t
gf100_fifo_intr(struct nvkm_inth *inth)
{ … }

static void
gf100_fifo_init_pbdmas(struct nvkm_fifo *fifo, u32 mask)
{ … }

static void
gf100_fifo_init(struct nvkm_fifo *fifo)
{ … }

static int
gf100_fifo_runl_ctor(struct nvkm_fifo *fifo)
{ … }

int
gf100_fifo_runq_nr(struct nvkm_fifo *fifo)
{ … }

int
gf100_fifo_chid_ctor(struct nvkm_fifo *fifo, int nr)
{ … }

static const struct nvkm_fifo_func
gf100_fifo = …;

int
gf100_fifo_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst,
	       struct nvkm_fifo **pfifo)
{ … }