linux/drivers/gpu/drm/nouveau/nvkm/engine/gr/nv10.c

/*
 * Copyright 2007 Matthieu CASTET <[email protected]>
 * All Rights Reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
 * to deal in the Software without restriction, including without limitation
 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
 * and/or sell copies of the Software, and to permit persons to whom the
 * Software is furnished to do so, subject to the following conditions:
 *
 * The above copyright notice and this permission notice (including the next
 * paragr) shall be included in all copies or substantial portions of the
 * Software.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
#include "nv10.h"
#include "regs.h"

#include <core/client.h>
#include <core/gpuobj.h>
#include <engine/fifo.h>
#include <engine/fifo/chan.h>
#include <subdev/fb.h>

struct pipe_state { … };

static int nv10_gr_ctx_regs[] = …;

static int nv17_gr_ctx_regs[] = …;

#define nv10_gr(p) …

struct nv10_gr { … };

#define nv10_gr_chan(p) …

struct nv10_gr_chan { … };


/*******************************************************************************
 * Graphics object classes
 ******************************************************************************/

#define PIPE_SAVE(gr, state, addr) …

#define PIPE_RESTORE(gr, state, addr) …

static void
nv17_gr_mthd_lma_window(struct nv10_gr_chan *chan, u32 mthd, u32 data)
{ … }

static void
nv17_gr_mthd_lma_enable(struct nv10_gr_chan *chan, u32 mthd, u32 data)
{ … }

static bool
nv17_gr_mthd_celcius(struct nv10_gr_chan *chan, u32 mthd, u32 data)
{ … }

static bool
nv10_gr_mthd(struct nv10_gr_chan *chan, u8 class, u32 mthd, u32 data)
{ … }

/*******************************************************************************
 * PGRAPH context
 ******************************************************************************/

static struct nv10_gr_chan *
nv10_gr_channel(struct nv10_gr *gr)
{ … }

static void
nv10_gr_save_pipe(struct nv10_gr_chan *chan)
{ … }

static void
nv10_gr_load_pipe(struct nv10_gr_chan *chan)
{ … }

static void
nv10_gr_create_pipe(struct nv10_gr_chan *chan)
{ … }

static int
nv10_gr_ctx_regs_find_offset(struct nv10_gr *gr, int reg)
{ … }

static int
nv17_gr_ctx_regs_find_offset(struct nv10_gr *gr, int reg)
{ … }

static void
nv10_gr_load_dma_vtxbuf(struct nv10_gr_chan *chan, int chid, u32 inst)
{ … }

static int
nv10_gr_load_context(struct nv10_gr_chan *chan, int chid)
{ … }

static int
nv10_gr_unload_context(struct nv10_gr_chan *chan)
{ … }

static void
nv10_gr_context_switch(struct nv10_gr *gr)
{ … }

static int
nv10_gr_chan_fini(struct nvkm_object *object, bool suspend)
{ … }

static void *
nv10_gr_chan_dtor(struct nvkm_object *object)
{ … }

static const struct nvkm_object_func
nv10_gr_chan = …;

#define NV_WRITE_CTX(reg, val) …

#define NV17_WRITE_CTX(reg, val) …

int
nv10_gr_chan_new(struct nvkm_gr *base, struct nvkm_chan *fifoch,
		 const struct nvkm_oclass *oclass, struct nvkm_object **pobject)
{ … }

/*******************************************************************************
 * PGRAPH engine/subdev functions
 ******************************************************************************/

void
nv10_gr_tile(struct nvkm_gr *base, int i, struct nvkm_fb_tile *tile)
{ … }

const struct nvkm_bitfield nv10_gr_intr_name[] = …;

const struct nvkm_bitfield nv10_gr_nstatus[] = …;

void
nv10_gr_intr(struct nvkm_gr *base)
{ … }

int
nv10_gr_init(struct nvkm_gr *base)
{ … }

int
nv10_gr_new_(const struct nvkm_gr_func *func, struct nvkm_device *device,
	     enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
{ … }

static const struct nvkm_gr_func
nv10_gr = …;

int
nv10_gr_new(struct nvkm_device *device, enum nvkm_subdev_type type, int inst, struct nvkm_gr **pgr)
{ … }