/* * Copyright 2005 Stephane Marchesin. * All Rights Reserved. * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR * OTHER DEALINGS IN THE SOFTWARE. */ #ifndef __NOUVEAU_DRM_H__ #define __NOUVEAU_DRM_H__ #define DRM_NOUVEAU_EVENT_NVIF … #include "drm.h" #if defined(__cplusplus) extern "C" { #endif #define NOUVEAU_GETPARAM_PCI_VENDOR … #define NOUVEAU_GETPARAM_PCI_DEVICE … #define NOUVEAU_GETPARAM_BUS_TYPE … #define NOUVEAU_GETPARAM_FB_SIZE … #define NOUVEAU_GETPARAM_AGP_SIZE … #define NOUVEAU_GETPARAM_CHIPSET_ID … #define NOUVEAU_GETPARAM_VM_VRAM_BASE … #define NOUVEAU_GETPARAM_GRAPH_UNITS … #define NOUVEAU_GETPARAM_PTIMER_TIME … #define NOUVEAU_GETPARAM_HAS_BO_USAGE … #define NOUVEAU_GETPARAM_HAS_PAGEFLIP … /* * NOUVEAU_GETPARAM_EXEC_PUSH_MAX - query max pushes through getparam * * Query the maximum amount of IBs that can be pushed through a single * &drm_nouveau_exec structure and hence a single &DRM_IOCTL_NOUVEAU_EXEC * ioctl(). */ #define NOUVEAU_GETPARAM_EXEC_PUSH_MAX … /* * NOUVEAU_GETPARAM_VRAM_BAR_SIZE - query bar size * * Query the VRAM BAR size. */ #define NOUVEAU_GETPARAM_VRAM_BAR_SIZE … /* * NOUVEAU_GETPARAM_VRAM_USED * * Get remaining VRAM size. */ #define NOUVEAU_GETPARAM_VRAM_USED … /* * NOUVEAU_GETPARAM_HAS_VMA_TILEMODE * * Query whether tile mode and PTE kind are accepted with VM allocs or not. */ #define NOUVEAU_GETPARAM_HAS_VMA_TILEMODE … struct drm_nouveau_getparam { … }; /* * Those are used to support selecting the main engine used on Kepler. * This goes into drm_nouveau_channel_alloc::tt_ctxdma_handle */ #define NOUVEAU_FIFO_ENGINE_GR … #define NOUVEAU_FIFO_ENGINE_VP … #define NOUVEAU_FIFO_ENGINE_PPP … #define NOUVEAU_FIFO_ENGINE_BSP … #define NOUVEAU_FIFO_ENGINE_CE … struct drm_nouveau_channel_alloc { … }; struct drm_nouveau_channel_free { … }; struct drm_nouveau_notifierobj_alloc { … }; struct drm_nouveau_gpuobj_free { … }; #define NOUVEAU_GEM_DOMAIN_CPU … #define NOUVEAU_GEM_DOMAIN_VRAM … #define NOUVEAU_GEM_DOMAIN_GART … #define NOUVEAU_GEM_DOMAIN_MAPPABLE … #define NOUVEAU_GEM_DOMAIN_COHERENT … /* The BO will never be shared via import or export. */ #define NOUVEAU_GEM_DOMAIN_NO_SHARE … #define NOUVEAU_GEM_TILE_COMP … #define NOUVEAU_GEM_TILE_LAYOUT_MASK … #define NOUVEAU_GEM_TILE_16BPP … #define NOUVEAU_GEM_TILE_32BPP … #define NOUVEAU_GEM_TILE_ZETA … #define NOUVEAU_GEM_TILE_NONCONTIG … struct drm_nouveau_gem_info { … }; struct drm_nouveau_gem_new { … }; #define NOUVEAU_GEM_MAX_BUFFERS … struct drm_nouveau_gem_pushbuf_bo_presumed { … }; struct drm_nouveau_gem_pushbuf_bo { … }; #define NOUVEAU_GEM_RELOC_LOW … #define NOUVEAU_GEM_RELOC_HIGH … #define NOUVEAU_GEM_RELOC_OR … #define NOUVEAU_GEM_MAX_RELOCS … struct drm_nouveau_gem_pushbuf_reloc { … }; #define NOUVEAU_GEM_MAX_PUSH … struct drm_nouveau_gem_pushbuf_push { … }; struct drm_nouveau_gem_pushbuf { … }; #define NOUVEAU_GEM_CPU_PREP_NOWAIT … #define NOUVEAU_GEM_CPU_PREP_WRITE … struct drm_nouveau_gem_cpu_prep { … }; struct drm_nouveau_gem_cpu_fini { … }; /** * struct drm_nouveau_sync - sync object * * This structure serves as synchronization mechanism for (potentially) * asynchronous operations such as EXEC or VM_BIND. */ struct drm_nouveau_sync { … }; /** * struct drm_nouveau_vm_init - GPU VA space init structure * * Used to initialize the GPU's VA space for a user client, telling the kernel * which portion of the VA space is managed by the UMD and kernel respectively. * * For the UMD to use the VM_BIND uAPI, this must be called before any BOs or * channels are created; if called afterwards DRM_IOCTL_NOUVEAU_VM_INIT fails * with -ENOSYS. */ struct drm_nouveau_vm_init { … }; /** * struct drm_nouveau_vm_bind_op - VM_BIND operation * * This structure represents a single VM_BIND operation. UMDs should pass * an array of this structure via struct drm_nouveau_vm_bind's &op_ptr field. */ struct drm_nouveau_vm_bind_op { … }; /** * struct drm_nouveau_vm_bind - structure for DRM_IOCTL_NOUVEAU_VM_BIND */ struct drm_nouveau_vm_bind { … }; /** * struct drm_nouveau_exec_push - EXEC push operation * * This structure represents a single EXEC push operation. UMDs should pass an * array of this structure via struct drm_nouveau_exec's &push_ptr field. */ struct drm_nouveau_exec_push { … }; /** * struct drm_nouveau_exec - structure for DRM_IOCTL_NOUVEAU_EXEC */ struct drm_nouveau_exec { … }; #define DRM_NOUVEAU_GETPARAM … #define DRM_NOUVEAU_SETPARAM … #define DRM_NOUVEAU_CHANNEL_ALLOC … #define DRM_NOUVEAU_CHANNEL_FREE … #define DRM_NOUVEAU_GROBJ_ALLOC … #define DRM_NOUVEAU_NOTIFIEROBJ_ALLOC … #define DRM_NOUVEAU_GPUOBJ_FREE … #define DRM_NOUVEAU_NVIF … #define DRM_NOUVEAU_SVM_INIT … #define DRM_NOUVEAU_SVM_BIND … #define DRM_NOUVEAU_VM_INIT … #define DRM_NOUVEAU_VM_BIND … #define DRM_NOUVEAU_EXEC … #define DRM_NOUVEAU_GEM_NEW … #define DRM_NOUVEAU_GEM_PUSHBUF … #define DRM_NOUVEAU_GEM_CPU_PREP … #define DRM_NOUVEAU_GEM_CPU_FINI … #define DRM_NOUVEAU_GEM_INFO … struct drm_nouveau_svm_init { … }; struct drm_nouveau_svm_bind { … }; #define NOUVEAU_SVM_BIND_COMMAND_SHIFT … #define NOUVEAU_SVM_BIND_COMMAND_BITS … #define NOUVEAU_SVM_BIND_COMMAND_MASK … #define NOUVEAU_SVM_BIND_PRIORITY_SHIFT … #define NOUVEAU_SVM_BIND_PRIORITY_BITS … #define NOUVEAU_SVM_BIND_PRIORITY_MASK … #define NOUVEAU_SVM_BIND_TARGET_SHIFT … #define NOUVEAU_SVM_BIND_TARGET_BITS … #define NOUVEAU_SVM_BIND_TARGET_MASK … /* * Below is use to validate ioctl argument, userspace can also use it to make * sure that no bit are set beyond known fields for a given kernel version. */ #define NOUVEAU_SVM_BIND_VALID_BITS … #define NOUVEAU_SVM_BIND_VALID_MASK … /* * NOUVEAU_BIND_COMMAND__MIGRATE: synchronous migrate to target memory. * result: number of page successfuly migrate to the target memory. */ #define NOUVEAU_SVM_BIND_COMMAND__MIGRATE … /* * NOUVEAU_SVM_BIND_HEADER_TARGET__GPU_VRAM: target the GPU VRAM memory. */ #define NOUVEAU_SVM_BIND_TARGET__GPU_VRAM … #define DRM_IOCTL_NOUVEAU_GETPARAM … #define DRM_IOCTL_NOUVEAU_CHANNEL_ALLOC … #define DRM_IOCTL_NOUVEAU_CHANNEL_FREE … #define DRM_IOCTL_NOUVEAU_SVM_INIT … #define DRM_IOCTL_NOUVEAU_SVM_BIND … #define DRM_IOCTL_NOUVEAU_GEM_NEW … #define DRM_IOCTL_NOUVEAU_GEM_PUSHBUF … #define DRM_IOCTL_NOUVEAU_GEM_CPU_PREP … #define DRM_IOCTL_NOUVEAU_GEM_CPU_FINI … #define DRM_IOCTL_NOUVEAU_GEM_INFO … #define DRM_IOCTL_NOUVEAU_VM_INIT … #define DRM_IOCTL_NOUVEAU_VM_BIND … #define DRM_IOCTL_NOUVEAU_EXEC … #if defined(__cplusplus) } #endif #endif /* __NOUVEAU_DRM_H__ */
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