/* * Copyright 1993-2003 NVIDIA, Corporation * Copyright 2006 Dave Airlie * Copyright 2007 Maarten Maathuis * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER * DEALINGS IN THE SOFTWARE. */ #include <drm/drm_crtc_helper.h> #include <drm/drm_fourcc.h> #include <drm/drm_modeset_helper_vtables.h> #include <drm/drm_plane_helper.h> #include <drm/drm_vblank.h> #include "nouveau_drv.h" #include "nouveau_reg.h" #include "nouveau_ttm.h" #include "nouveau_bo.h" #include "nouveau_gem.h" #include "nouveau_encoder.h" #include "nouveau_connector.h" #include "nouveau_crtc.h" #include "hw.h" #include "nvreg.h" #include "disp.h" #include "nouveau_dma.h" #include <subdev/bios/pll.h> #include <subdev/clk.h> #include <nvif/push006c.h> #include <nvif/event.h> #include <nvif/cl0046.h> static int nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb); static void crtc_wr_cio_state(struct drm_crtc *crtc, struct nv04_crtc_reg *crtcstate, int index) { … } static void nv_crtc_set_digital_vibrance(struct drm_crtc *crtc, int level) { … } static void nv_crtc_set_image_sharpening(struct drm_crtc *crtc, int level) { … } #define PLLSEL_VPLL1_MASK … #define PLLSEL_VPLL2_MASK … #define PLLSEL_TV_MASK … /* NV4x 0x40.. pll notes: * gpu pll: 0x4000 + 0x4004 * ?gpu? pll: 0x4008 + 0x400c * vpll1: 0x4010 + 0x4014 * vpll2: 0x4018 + 0x401c * mpll: 0x4020 + 0x4024 * mpll: 0x4038 + 0x403c * * the first register of each pair has some unknown details: * bits 0-7: redirected values from elsewhere? (similar to PLL_SETUP_CONTROL?) * bits 20-23: (mpll) something to do with post divider? * bits 28-31: related to single stage mode? (bit 8/12) */ static void nv_crtc_calc_state_ext(struct drm_crtc *crtc, struct drm_display_mode * mode, int dot_clock) { … } static void nv_crtc_dpms(struct drm_crtc *crtc, int mode) { … } static void nv_crtc_mode_set_vga(struct drm_crtc *crtc, struct drm_display_mode *mode) { … } /* * Sets up registers for the given mode/adjusted_mode pair. * * The clocks, CRTCs and outputs attached to this CRTC must be off. * * This shouldn't enable any clocks, CRTCs, or outputs, but they should * be easily turned on/off after this. */ static void nv_crtc_mode_set_regs(struct drm_crtc *crtc, struct drm_display_mode * mode) { … } static int nv_crtc_swap_fbs(struct drm_crtc *crtc, struct drm_framebuffer *old_fb) { … } /* * Sets up registers for the given mode/adjusted_mode pair. * * The clocks, CRTCs and outputs attached to this CRTC must be off. * * This shouldn't enable any clocks, CRTCs, or outputs, but they should * be easily turned on/off after this. */ static int nv_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode, int x, int y, struct drm_framebuffer *old_fb) { … } static void nv_crtc_save(struct drm_crtc *crtc) { … } static void nv_crtc_restore(struct drm_crtc *crtc) { … } static void nv_crtc_prepare(struct drm_crtc *crtc) { … } static void nv_crtc_commit(struct drm_crtc *crtc) { … } static void nv_crtc_destroy(struct drm_crtc *crtc) { … } static void nv_crtc_gamma_load(struct drm_crtc *crtc) { … } static void nv_crtc_disable(struct drm_crtc *crtc) { … } static int nv_crtc_gamma_set(struct drm_crtc *crtc, u16 *r, u16 *g, u16 *b, uint32_t size, struct drm_modeset_acquire_ctx *ctx) { … } static int nv04_crtc_do_mode_set_base(struct drm_crtc *crtc, struct drm_framebuffer *passed_fb, int x, int y, bool atomic) { … } static int nv04_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y, struct drm_framebuffer *old_fb) { … } static int nv04_crtc_mode_set_base_atomic(struct drm_crtc *crtc, struct drm_framebuffer *fb, int x, int y, enum mode_set_atomic state) { … } static void nv04_cursor_upload(struct drm_device *dev, struct nouveau_bo *src, struct nouveau_bo *dst) { … } static void nv11_cursor_upload(struct drm_device *dev, struct nouveau_bo *src, struct nouveau_bo *dst) { … } static int nv04_crtc_cursor_set(struct drm_crtc *crtc, struct drm_file *file_priv, uint32_t buffer_handle, uint32_t width, uint32_t height) { … } static int nv04_crtc_cursor_move(struct drm_crtc *crtc, int x, int y) { … } struct nv04_page_flip_state { … }; static int nv04_finish_page_flip(struct nouveau_channel *chan, struct nv04_page_flip_state *ps) { … } int nv04_flip_complete(struct nvif_event *event, void *argv, u32 argc) { … } static int nv04_page_flip_emit(struct nouveau_channel *chan, struct nouveau_bo *old_bo, struct nouveau_bo *new_bo, struct nv04_page_flip_state *s, struct nouveau_fence **pfence) { … } static int nv04_crtc_page_flip(struct drm_crtc *crtc, struct drm_framebuffer *fb, struct drm_pending_vblank_event *event, u32 flags, struct drm_modeset_acquire_ctx *ctx) { … } static const struct drm_crtc_funcs nv04_crtc_funcs = …; static const struct drm_crtc_helper_funcs nv04_crtc_helper_funcs = …; static const uint32_t modeset_formats[] = …; static const struct drm_plane_funcs nv04_primary_plane_funcs = …; static int nv04_crtc_vblank_handler(struct nvif_event *event, void *repv, u32 repc) { … } int nv04_crtc_create(struct drm_device *dev, int crtc_num) { … }
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