linux/drivers/gpu/drm/exynos/exynos_drm_mic.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2015 Samsung Electronics Co.Ltd
 * Authors:
 *	Hyungwon Hwang <[email protected]>
 */

#include <linux/clk.h>
#include <linux/component.h>
#include <linux/delay.h>
#include <linux/mfd/syscon.h>
#include <linux/module.h>
#include <linux/mutex.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/of_graph.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/regmap.h>

#include <video/of_videomode.h>
#include <video/videomode.h>

#include <drm/drm_bridge.h>
#include <drm/drm_encoder.h>
#include <drm/drm_print.h>

#include "exynos_drm_drv.h"
#include "exynos_drm_crtc.h"

/* Sysreg registers for MIC */
#define DSD_CFG_MUX
#define MIC0_RGB_MUX
#define MIC0_I80_MUX
#define MIC0_ON_MUX

/* MIC registers */
#define MIC_OP
#define MIC_IP_VER
#define MIC_V_TIMING_0
#define MIC_V_TIMING_1
#define MIC_IMG_SIZE
#define MIC_INPUT_TIMING_0
#define MIC_INPUT_TIMING_1
#define MIC_2D_OUTPUT_TIMING_0
#define MIC_2D_OUTPUT_TIMING_1
#define MIC_2D_OUTPUT_TIMING_2
#define MIC_3D_OUTPUT_TIMING_0
#define MIC_3D_OUTPUT_TIMING_1
#define MIC_3D_OUTPUT_TIMING_2
#define MIC_CORE_PARA_0
#define MIC_CORE_PARA_1
#define MIC_CTC_CTRL
#define MIC_RD_DATA

#define MIC_UPD_REG
#define MIC_ON_REG
#define MIC_TD_ON_REG
#define MIC_BS_CHG_OUT
#define MIC_VIDEO_TYPE(x)
#define MIC_PSR_EN
#define MIC_SW_RST
#define MIC_ALL_RST
#define MIC_CORE_VER_CONTROL
#define MIC_MODE_SEL_COMMAND_MODE
#define MIC_MODE_SEL_MASK
#define MIC_CORE_EN

#define MIC_V_PULSE_WIDTH(x)
#define MIC_V_PERIOD_LINE(x)

#define MIC_VBP_SIZE(x)
#define MIC_VFP_SIZE(x)

#define MIC_IMG_V_SIZE(x)
#define MIC_IMG_H_SIZE(x)

#define MIC_H_PULSE_WIDTH_IN(x)
#define MIC_H_PERIOD_PIXEL_IN(x)

#define MIC_HBP_SIZE_IN(x)
#define MIC_HFP_SIZE_IN(x)

#define MIC_H_PULSE_WIDTH_2D(x)
#define MIC_H_PERIOD_PIXEL_2D(x)

#define MIC_HBP_SIZE_2D(x)
#define MIC_HFP_SIZE_2D(x)

#define MIC_BS_SIZE_2D(x)

static const char *const clk_names[] =;
#define NUM_CLKS
static DEFINE_MUTEX(mic_mutex);

struct exynos_mic {};

static void mic_set_path(struct exynos_mic *mic, bool enable)
{}

static int mic_sw_reset(struct exynos_mic *mic)
{}

static void mic_set_porch_timing(struct exynos_mic *mic)
{}

static void mic_set_img_size(struct exynos_mic *mic)
{}

static void mic_set_output_timing(struct exynos_mic *mic)
{}

static void mic_set_reg_on(struct exynos_mic *mic, bool enable)
{}

static void mic_post_disable(struct drm_bridge *bridge)
{}

static void mic_mode_set(struct drm_bridge *bridge,
			 const struct drm_display_mode *mode,
			 const struct drm_display_mode *adjusted_mode)
{}

static void mic_pre_enable(struct drm_bridge *bridge)
{}

static const struct drm_bridge_funcs mic_bridge_funcs =;

static int exynos_mic_bind(struct device *dev, struct device *master,
			   void *data)
{}

static void exynos_mic_unbind(struct device *dev, struct device *master,
			      void *data)
{}

static const struct component_ops exynos_mic_component_ops =;

static int exynos_mic_suspend(struct device *dev)
{}

static int exynos_mic_resume(struct device *dev)
{}

static DEFINE_RUNTIME_DEV_PM_OPS(exynos_mic_pm_ops, exynos_mic_suspend,
				 exynos_mic_resume, NULL);

static int exynos_mic_probe(struct platform_device *pdev)
{}

static void exynos_mic_remove(struct platform_device *pdev)
{}

static const struct of_device_id exynos_mic_of_match[] =;
MODULE_DEVICE_TABLE(of, exynos_mic_of_match);

struct platform_driver mic_driver =;