/* * Copyright © 2012 Intel Corporation * * Permission is hereby granted, free of charge, to any person obtaining a * copy of this software and associated documentation files (the "Software"), * to deal in the Software without restriction, including without limitation * the rights to use, copy, modify, merge, publish, distribute, sublicense, * and/or sell copies of the Software, and to permit persons to whom the * Software is furnished to do so, subject to the following conditions: * * The above copyright notice and this permission notice (including the next * paragraph) shall be included in all copies or substantial portions of the * Software. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS * IN THE SOFTWARE. * * Authors: * Keith Packard <[email protected]> * */ #include <linux/i2c.h> #include <linux/module.h> #include <linux/slab.h> #include <drm/display/drm_dp_helper.h> #include <drm/drm_crtc.h> #include <drm/drm_crtc_helper.h> #include <drm/drm_edid.h> #include <drm/drm_modeset_helper_vtables.h> #include <drm/drm_simple_kms_helper.h> #include "gma_display.h" #include "psb_drv.h" #include "psb_intel_drv.h" #include "psb_intel_reg.h" /** * struct i2c_algo_dp_aux_data - driver interface structure for i2c over dp * aux algorithm * @running: set by the algo indicating whether an i2c is ongoing or whether * the i2c bus is quiescent * @address: i2c target address for the currently ongoing transfer * @aux_ch: driver callback to transfer a single byte of the i2c payload */ struct i2c_algo_dp_aux_data { … }; /* Run a single AUX_CH I2C transaction, writing/reading data as necessary */ static int i2c_algo_dp_aux_transaction(struct i2c_adapter *adapter, int mode, uint8_t write_byte, uint8_t *read_byte) { … } /* * I2C over AUX CH */ /* * Send the address. If the I2C link is running, this 'restarts' * the connection with the new address, this is used for doing * a write followed by a read (as needed for DDC) */ static int i2c_algo_dp_aux_address(struct i2c_adapter *adapter, u16 address, bool reading) { … } /* * Stop the I2C transaction. This closes out the link, sending * a bare address packet with the MOT bit turned off */ static void i2c_algo_dp_aux_stop(struct i2c_adapter *adapter, bool reading) { … } /* * Write a single byte to the current I2C address, the * I2C link must be running or this returns -EIO */ static int i2c_algo_dp_aux_put_byte(struct i2c_adapter *adapter, u8 byte) { … } /* * Read a single byte from the current I2C address, the * I2C link must be running or this returns -EIO */ static int i2c_algo_dp_aux_get_byte(struct i2c_adapter *adapter, u8 *byte_ret) { … } static int i2c_algo_dp_aux_xfer(struct i2c_adapter *adapter, struct i2c_msg *msgs, int num) { … } static u32 i2c_algo_dp_aux_functionality(struct i2c_adapter *adapter) { … } static const struct i2c_algorithm i2c_dp_aux_algo = …; static void i2c_dp_aux_reset_bus(struct i2c_adapter *adapter) { … } static int i2c_dp_aux_prepare_bus(struct i2c_adapter *adapter) { … } /* * FIXME: This is the old dp aux helper, gma500 is the last driver that needs to * be ported over to the new helper code in drm_dp_helper.c like i915 or radeon. */ static int i2c_dp_aux_add_bus(struct i2c_adapter *adapter) { … } #define _wait_for(COND, MS, W) … #define wait_for(COND, MS) … #define DP_LINK_CHECK_TIMEOUT … #define DP_LINK_CONFIGURATION_SIZE … #define CDV_FAST_LINK_TRAIN … struct cdv_intel_dp { … }; struct ddi_regoff { … }; static struct ddi_regoff ddi_DP_train_table[] = …; static uint32_t dp_vswing_premph_table[] = …; /** * is_edp - is the given port attached to an eDP panel (either CPU or PCH) * @encoder: GMA encoder struct * * If a CPU or PCH DP output is attached to an eDP panel, this function * will return true, and false otherwise. */ static bool is_edp(struct gma_encoder *encoder) { … } static void cdv_intel_dp_start_link_train(struct gma_encoder *encoder); static void cdv_intel_dp_complete_link_train(struct gma_encoder *encoder); static void cdv_intel_dp_link_down(struct gma_encoder *encoder); static int cdv_intel_dp_max_lane_count(struct gma_encoder *encoder) { … } static int cdv_intel_dp_max_link_bw(struct gma_encoder *encoder) { … } static int cdv_intel_dp_link_clock(uint8_t link_bw) { … } static int cdv_intel_dp_link_required(int pixel_clock, int bpp) { … } static int cdv_intel_dp_max_data_rate(int max_link_clock, int max_lanes) { … } static void cdv_intel_edp_panel_vdd_on(struct gma_encoder *intel_encoder) { … } static void cdv_intel_edp_panel_vdd_off(struct gma_encoder *intel_encoder) { … } /* Returns true if the panel was already on when called */ static bool cdv_intel_edp_panel_on(struct gma_encoder *intel_encoder) { … } static void cdv_intel_edp_panel_off (struct gma_encoder *intel_encoder) { … } static void cdv_intel_edp_backlight_on (struct gma_encoder *intel_encoder) { … } static void cdv_intel_edp_backlight_off (struct gma_encoder *intel_encoder) { … } static enum drm_mode_status cdv_intel_dp_mode_valid(struct drm_connector *connector, struct drm_display_mode *mode) { … } static uint32_t pack_aux(uint8_t *src, int src_bytes) { … } static void unpack_aux(uint32_t src, uint8_t *dst, int dst_bytes) { … } static int cdv_intel_dp_aux_ch(struct gma_encoder *encoder, uint8_t *send, int send_bytes, uint8_t *recv, int recv_size) { … } /* Write data to the aux channel in native mode */ static int cdv_intel_dp_aux_native_write(struct gma_encoder *encoder, uint16_t address, uint8_t *send, int send_bytes) { … } /* Write a single byte to the aux channel in native mode */ static int cdv_intel_dp_aux_native_write_1(struct gma_encoder *encoder, uint16_t address, uint8_t byte) { … } /* read bytes from a native aux channel */ static int cdv_intel_dp_aux_native_read(struct gma_encoder *encoder, uint16_t address, uint8_t *recv, int recv_bytes) { … } static int cdv_intel_dp_i2c_aux_ch(struct i2c_adapter *adapter, int mode, uint8_t write_byte, uint8_t *read_byte) { … } static int cdv_intel_dp_i2c_init(struct gma_connector *connector, struct gma_encoder *encoder, const char *name) { … } static void cdv_intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, struct drm_display_mode *adjusted_mode) { … } static bool cdv_intel_dp_mode_fixup(struct drm_encoder *encoder, const struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { … } struct cdv_intel_dp_m_n { … }; static void cdv_intel_reduce_ratio(uint32_t *num, uint32_t *den) { … } static void cdv_intel_dp_compute_m_n(int bpp, int nlanes, int pixel_clock, int link_clock, struct cdv_intel_dp_m_n *m_n) { … } void cdv_intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { … } static void cdv_intel_dp_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adjusted_mode) { … } /* If the sink supports it, try to set the power state appropriately */ static void cdv_intel_dp_sink_dpms(struct gma_encoder *encoder, int mode) { … } static void cdv_intel_dp_prepare(struct drm_encoder *encoder) { … } static void cdv_intel_dp_commit(struct drm_encoder *encoder) { … } static void cdv_intel_dp_dpms(struct drm_encoder *encoder, int mode) { … } /* * Native read with retry for link status and receiver capability reads for * cases where the sink may still be asleep. */ static bool cdv_intel_dp_aux_native_read_retry(struct gma_encoder *encoder, uint16_t address, uint8_t *recv, int recv_bytes) { … } /* * Fetch AUX CH registers 0x202 - 0x207 which contain * link status information */ static bool cdv_intel_dp_get_link_status(struct gma_encoder *encoder) { … } static uint8_t cdv_intel_dp_link_status(uint8_t link_status[DP_LINK_STATUS_SIZE], int r) { … } static uint8_t cdv_intel_get_adjust_request_voltage(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane) { … } static uint8_t cdv_intel_get_adjust_request_pre_emphasis(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane) { … } #define CDV_DP_VOLTAGE_MAX … static void cdv_intel_get_adjust_train(struct gma_encoder *encoder) { … } static uint8_t cdv_intel_get_lane_status(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane) { … } /* Check for clock recovery is done on all channels */ static bool cdv_intel_clock_recovery_ok(uint8_t link_status[DP_LINK_STATUS_SIZE], int lane_count) { … } /* Check to see if channel eq is done on all channels */ #define CHANNEL_EQ_BITS … static bool cdv_intel_channel_eq_ok(struct gma_encoder *encoder) { … } static bool cdv_intel_dp_set_link_train(struct gma_encoder *encoder, uint32_t dp_reg_value, uint8_t dp_train_pat) { … } static bool cdv_intel_dplink_set_level(struct gma_encoder *encoder, uint8_t dp_train_pat) { … } static void cdv_intel_dp_set_vswing_premph(struct gma_encoder *encoder, uint8_t signal_level) { … } /* Enable corresponding port and start training pattern 1 */ static void cdv_intel_dp_start_link_train(struct gma_encoder *encoder) { … } static void cdv_intel_dp_complete_link_train(struct gma_encoder *encoder) { … } static void cdv_intel_dp_link_down(struct gma_encoder *encoder) { … } static enum drm_connector_status cdv_dp_detect(struct gma_encoder *encoder) { … } /* * Uses CRT_HOTPLUG_EN and CRT_HOTPLUG_STAT to detect DP connection. * * \return true if DP port is connected. * \return false if DP port is disconnected. */ static enum drm_connector_status cdv_intel_dp_detect(struct drm_connector *connector, bool force) { … } static int cdv_intel_dp_get_modes(struct drm_connector *connector) { … } static bool cdv_intel_dp_detect_audio(struct drm_connector *connector) { … } static int cdv_intel_dp_set_property(struct drm_connector *connector, struct drm_property *property, uint64_t val) { … } static void cdv_intel_dp_destroy(struct drm_connector *connector) { … } static const struct drm_encoder_helper_funcs cdv_intel_dp_helper_funcs = …; static const struct drm_connector_funcs cdv_intel_dp_connector_funcs = …; static const struct drm_connector_helper_funcs cdv_intel_dp_connector_helper_funcs = …; static void cdv_intel_dp_add_properties(struct drm_connector *connector) { … } /* check the VBT to see whether the eDP is on DP-D port */ static bool cdv_intel_dpc_is_edp(struct drm_device *dev) { … } /* Cedarview display clock gating We need this disable dot get correct behaviour while enabling DP/eDP. TODO - investigate if we can turn it back to normality after enabling */ static void cdv_disable_intel_clock_gating(struct drm_device *dev) { … } void cdv_intel_dp_init(struct drm_device *dev, struct psb_intel_mode_device *mode_dev, int output_reg) { … }
Codebase Browser
linux