linux/drivers/gpu/drm/msm/adreno/adreno_gpu.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <[email protected]>
 *
 * Copyright (c) 2014 The Linux Foundation. All rights reserved.
 */

#include <linux/ascii85.h>
#include <linux/interconnect.h>
#include <linux/firmware/qcom/qcom_scm.h>
#include <linux/kernel.h>
#include <linux/of_address.h>
#include <linux/pm_opp.h>
#include <linux/slab.h>
#include <linux/soc/qcom/mdt_loader.h>
#include <linux/nvmem-consumer.h>
#include <soc/qcom/ocmem.h>
#include "adreno_gpu.h"
#include "a6xx_gpu.h"
#include "msm_gem.h"
#include "msm_mmu.h"

static u64 address_space_size = …;
MODULE_PARM_DESC(…) …;
module_param(address_space_size, ullong, 0600);

static bool zap_available = …;

static int zap_shader_load_mdt(struct msm_gpu *gpu, const char *fwname,
		u32 pasid)
{ … }

int adreno_zap_shader_load(struct msm_gpu *gpu, u32 pasid)
{ … }

struct msm_gem_address_space *
adreno_create_address_space(struct msm_gpu *gpu,
			    struct platform_device *pdev)
{ … }

struct msm_gem_address_space *
adreno_iommu_create_address_space(struct msm_gpu *gpu,
				  struct platform_device *pdev,
				  unsigned long quirks)
{ … }

u64 adreno_private_address_space_size(struct msm_gpu *gpu)
{ … }

#define ARM_SMMU_FSR_TF …
#define ARM_SMMU_FSR_PF …
#define ARM_SMMU_FSR_EF …

int adreno_fault_handler(struct msm_gpu *gpu, unsigned long iova, int flags,
			 struct adreno_smmu_fault_info *info, const char *block,
			 u32 scratch[4])
{ … }

int adreno_get_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
		     uint32_t param, uint64_t *value, uint32_t *len)
{ … }

int adreno_set_param(struct msm_gpu *gpu, struct msm_file_private *ctx,
		     uint32_t param, uint64_t value, uint32_t len)
{ … }

const struct firmware *
adreno_request_fw(struct adreno_gpu *adreno_gpu, const char *fwname)
{ … }

int adreno_load_fw(struct adreno_gpu *adreno_gpu)
{ … }

struct drm_gem_object *adreno_fw_create_bo(struct msm_gpu *gpu,
		const struct firmware *fw, u64 *iova)
{ … }

int adreno_hw_init(struct msm_gpu *gpu)
{ … }

/* Use this helper to read rptr, since a430 doesn't update rptr in memory */
static uint32_t get_rptr(struct adreno_gpu *adreno_gpu,
		struct msm_ringbuffer *ring)
{ … }

struct msm_ringbuffer *adreno_active_ring(struct msm_gpu *gpu)
{ … }

void adreno_recover(struct msm_gpu *gpu)
{ … }

void adreno_flush(struct msm_gpu *gpu, struct msm_ringbuffer *ring, u32 reg)
{ … }

bool adreno_idle(struct msm_gpu *gpu, struct msm_ringbuffer *ring)
{ … }

int adreno_gpu_state_get(struct msm_gpu *gpu, struct msm_gpu_state *state)
{ … }

void adreno_gpu_state_destroy(struct msm_gpu_state *state)
{ … }

static void adreno_gpu_state_kref_destroy(struct kref *kref)
{ … }

int adreno_gpu_state_put(struct msm_gpu_state *state)
{ … }

#if defined(CONFIG_DEBUG_FS) || defined(CONFIG_DEV_COREDUMP)

static char *adreno_gpu_ascii85_encode(u32 *src, size_t len)
{ … }

/* len is expected to be in bytes
 *
 * WARNING: *ptr should be allocated with kvmalloc or friends.  It can be free'd
 * with kvfree() and replaced with a newly kvmalloc'd buffer on the first call
 * when the unencoded raw data is encoded
 */
void adreno_show_object(struct drm_printer *p, void **ptr, int len,
		bool *encoded)
{ … }

void adreno_show(struct msm_gpu *gpu, struct msm_gpu_state *state,
		struct drm_printer *p)
{ … }
#endif

/* Dump common gpu status and scratch registers on any hang, to make
 * the hangcheck logs more useful.  The scratch registers seem always
 * safe to read when GPU has hung (unlike some other regs, depending
 * on how the GPU hung), and they are useful to match up to cmdstream
 * dumps when debugging hangs:
 */
void adreno_dump_info(struct msm_gpu *gpu)
{ … }

/* would be nice to not have to duplicate the _show() stuff with printk(): */
void adreno_dump(struct msm_gpu *gpu)
{ … }

static uint32_t ring_freewords(struct msm_ringbuffer *ring)
{ … }

void adreno_wait_ring(struct msm_ringbuffer *ring, uint32_t ndwords)
{ … }

static int adreno_get_pwrlevels(struct device *dev,
		struct msm_gpu *gpu)
{ … }

int adreno_gpu_ocmem_init(struct device *dev, struct adreno_gpu *adreno_gpu,
			  struct adreno_ocmem *adreno_ocmem)
{ … }

void adreno_gpu_ocmem_cleanup(struct adreno_ocmem *adreno_ocmem)
{ … }

int adreno_read_speedbin(struct device *dev, u32 *speedbin)
{ … }

int adreno_gpu_init(struct drm_device *drm, struct platform_device *pdev,
		struct adreno_gpu *adreno_gpu,
		const struct adreno_gpu_funcs *funcs, int nr_rings)
{ … }

void adreno_gpu_cleanup(struct adreno_gpu *adreno_gpu)
{ … }