// SPDX-License-Identifier: GPL-2.0+ /* * Generic driver for memory-mapped GPIO controllers. * * Copyright 2008 MontaVista Software, Inc. * Copyright 2008,2010 Anton Vorontsov <[email protected]> * * ....``.```~~~~````.`.`.`.`.```````'',,,.........`````......`....... * ...`` ```````.. * ..The simplest form of a GPIO controller that the driver supports is`` * `.just a single "data" register, where GPIO state can be read and/or ` * `,..written. ,,..``~~~~ .....``.`.`.~~.```.`.........``````.``````` * ````````` ___ _/~~|___/~| . ```~~~~~~ ___/___\___ ,~.`.`.`.`````.~~...,,,,... __________|~$@~~~ %~ /o*o*o*o*o*o\ .. Implementing such a GPIO . o ` ~~~~\___/~~~~ ` controller in FPGA is ,.` `....trivial..'~`.```.``` * ``````` * .```````~~~~`..`.``.``. * . The driver supports `... ,..```.`~~~```````````````....````.``,, * . big-endian notation, just`. .. A bit more sophisticated controllers , * . register the device with -be`. .with a pair of set/clear-bit registers , * `.. suffix. ```~~`````....`.` . affecting the data register and the .` * ``.`.``...``` ```.. output pins are also supported.` * ^^ `````.`````````.,``~``~``~~`````` * . ^^ * ,..`.`.`...````````````......`.`.`.`.`.`..`.`.`.. * .. The expectation is that in at least some cases . ,-~~~-, * .this will be used with roll-your-own ASIC/FPGA .` \ / * .logic in Verilog or VHDL. ~~~`````````..`````~~` \ / * ..````````......``````````` \o_ * | * ^^ / \ * * ...`````~~`.....``.`..........``````.`.``.```........``. * ` 8, 16, 32 and 64 bits registers are supported, and``. * . the number of GPIOs is determined by the width of ~ * .. the registers. ,............```.`.`..`.`.~~~.`.`.`~ * `.......````.``` */ #include <linux/bitops.h> #include <linux/compiler.h> #include <linux/err.h> #include <linux/init.h> #include <linux/io.h> #include <linux/ioport.h> #include <linux/log2.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/property.h> #include <linux/slab.h> #include <linux/spinlock.h> #include <linux/types.h> #include <linux/gpio/driver.h> #include "gpiolib.h" static void bgpio_write8(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read8(void __iomem *reg) { … } static void bgpio_write16(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read16(void __iomem *reg) { … } static void bgpio_write32(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read32(void __iomem *reg) { … } #if BITS_PER_LONG >= 64 static void bgpio_write64(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read64(void __iomem *reg) { … } #endif /* BITS_PER_LONG >= 64 */ static void bgpio_write16be(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read16be(void __iomem *reg) { … } static void bgpio_write32be(void __iomem *reg, unsigned long data) { … } static unsigned long bgpio_read32be(void __iomem *reg) { … } static unsigned long bgpio_line2mask(struct gpio_chip *gc, unsigned int line) { … } static int bgpio_get_set(struct gpio_chip *gc, unsigned int gpio) { … } /* * This assumes that the bits in the GPIO register are in native endianness. * We only assign the function pointer if we have that. */ static int bgpio_get_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } static int bgpio_get(struct gpio_chip *gc, unsigned int gpio) { … } /* * This only works if the bits in the GPIO register are in native endianness. */ static int bgpio_get_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } /* * With big endian mirrored bit order it becomes more tedious. */ static int bgpio_get_multiple_be(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } static void bgpio_set_none(struct gpio_chip *gc, unsigned int gpio, int val) { … } static void bgpio_set(struct gpio_chip *gc, unsigned int gpio, int val) { … } static void bgpio_set_with_clear(struct gpio_chip *gc, unsigned int gpio, int val) { … } static void bgpio_set_set(struct gpio_chip *gc, unsigned int gpio, int val) { … } static void bgpio_multiple_get_masks(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits, unsigned long *set_mask, unsigned long *clear_mask) { … } static void bgpio_set_multiple_single_reg(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits, void __iomem *reg) { … } static void bgpio_set_multiple(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } static void bgpio_set_multiple_set(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } static void bgpio_set_multiple_with_clear(struct gpio_chip *gc, unsigned long *mask, unsigned long *bits) { … } static int bgpio_simple_dir_in(struct gpio_chip *gc, unsigned int gpio) { … } static int bgpio_dir_out_err(struct gpio_chip *gc, unsigned int gpio, int val) { … } static int bgpio_simple_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { … } static int bgpio_dir_in(struct gpio_chip *gc, unsigned int gpio) { … } static int bgpio_get_dir(struct gpio_chip *gc, unsigned int gpio) { … } static void bgpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) { … } static int bgpio_dir_out_dir_first(struct gpio_chip *gc, unsigned int gpio, int val) { … } static int bgpio_dir_out_val_first(struct gpio_chip *gc, unsigned int gpio, int val) { … } static int bgpio_setup_accessors(struct device *dev, struct gpio_chip *gc, bool byte_be) { … } /* * Create the device and allocate the resources. For setting GPIO's there are * three supported configurations: * * - single input/output register resource (named "dat"). * - set/clear pair (named "set" and "clr"). * - single output register resource and single input resource ("set" and * dat"). * * For the single output register, this drives a 1 by setting a bit and a zero * by clearing a bit. For the set clr pair, this drives a 1 by setting a bit * in the set register and clears it by setting a bit in the clear register. * The configuration is detected by which resources are present. * * For setting the GPIO direction, there are three supported configurations: * * - simple bidirection GPIO that requires no configuration. * - an output direction register (named "dirout") where a 1 bit * indicates the GPIO is an output. * - an input direction register (named "dirin") where a 1 bit indicates * the GPIO is an input. */ static int bgpio_setup_io(struct gpio_chip *gc, void __iomem *dat, void __iomem *set, void __iomem *clr, unsigned long flags) { … } static int bgpio_setup_direction(struct gpio_chip *gc, void __iomem *dirout, void __iomem *dirin, unsigned long flags) { … } static int bgpio_request(struct gpio_chip *chip, unsigned gpio_pin) { … } /** * bgpio_init() - Initialize generic GPIO accessor functions * @gc: the GPIO chip to set up * @dev: the parent device of the new GPIO chip (compulsory) * @sz: the size (width) of the MMIO registers in bytes, typically 1, 2 or 4 * @dat: MMIO address for the register to READ the value of the GPIO lines, it * is expected that a 1 in the corresponding bit in this register means the * line is asserted * @set: MMIO address for the register to SET the value of the GPIO lines, it is * expected that we write the line with 1 in this register to drive the GPIO line * high. * @clr: MMIO address for the register to CLEAR the value of the GPIO lines, it is * expected that we write the line with 1 in this register to drive the GPIO line * low. It is allowed to leave this address as NULL, in that case the SET register * will be assumed to also clear the GPIO lines, by actively writing the line * with 0. * @dirout: MMIO address for the register to set the line as OUTPUT. It is assumed * that setting a line to 1 in this register will turn that line into an * output line. Conversely, setting the line to 0 will turn that line into * an input. * @dirin: MMIO address for the register to set this line as INPUT. It is assumed * that setting a line to 1 in this register will turn that line into an * input line. Conversely, setting the line to 0 will turn that line into * an output. * @flags: Different flags that will affect the behaviour of the device, such as * endianness etc. */ int bgpio_init(struct gpio_chip *gc, struct device *dev, unsigned long sz, void __iomem *dat, void __iomem *set, void __iomem *clr, void __iomem *dirout, void __iomem *dirin, unsigned long flags) { … } EXPORT_SYMBOL_GPL(…); #if IS_ENABLED(CONFIG_GPIO_GENERIC_PLATFORM) static void __iomem *bgpio_map(struct platform_device *pdev, const char *name, resource_size_t sane_sz) { … } static const struct of_device_id bgpio_of_match[] = …; MODULE_DEVICE_TABLE(of, bgpio_of_match); static struct bgpio_pdata *bgpio_parse_fw(struct device *dev, unsigned long *flags) { … } static int bgpio_pdev_probe(struct platform_device *pdev) { … } static const struct platform_device_id bgpio_id_table[] = …; MODULE_DEVICE_TABLE(platform, bgpio_id_table); static struct platform_driver bgpio_driver = …; module_platform_driver(…) …; #endif /* CONFIG_GPIO_GENERIC_PLATFORM */ MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …;
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