/* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved. */ #ifndef _DPU_HW_INTERRUPTS_H #define _DPU_HW_INTERRUPTS_H #include <linux/types.h> #include "dpu_hwio.h" #include "dpu_hw_catalog.h" #include "dpu_hw_util.h" #include "dpu_hw_mdss.h" /* When making changes be sure to sync with dpu_intr_set */ enum dpu_hw_intr_reg { … }; #define MDP_INTFn_INTR(intf) … #define DPU_IRQ_IDX(reg_idx, offset) … #define DPU_IRQ_REG(irq_idx) … #define DPU_IRQ_BIT(irq_idx) … #define DPU_NUM_IRQS … struct dpu_hw_intr_entry { … }; /** * struct dpu_hw_intr: hw interrupts handling data structure * @hw: virtual address mapping * @ops: function pointer mapping for IRQ handling * @cache_irq_mask: array of IRQ enable masks reg storage created during init * @save_irq_status: array of IRQ status reg storage created during init * @irq_lock: spinlock for accessing IRQ resources * @irq_cb_tbl: array of IRQ callbacks */ struct dpu_hw_intr { … }; /** * dpu_hw_intr_init(): Initializes the interrupts hw object * @dev: Corresponding device for devres management * @addr: mapped register io address of MDP * @m: pointer to MDSS catalog data */ struct dpu_hw_intr *dpu_hw_intr_init(struct drm_device *dev, void __iomem *addr, const struct dpu_mdss_cfg *m); #endif