/* SPDX-License-Identifier: GPL-2.0-only */ /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. */ #ifndef _DPU_HW_TOP_H #define _DPU_HW_TOP_H #include "dpu_hw_catalog.h" #include "dpu_hw_mdss.h" #include "dpu_hw_util.h" struct dpu_hw_mdp; /** * struct traffic_shaper_cfg: traffic shaper configuration * @en : enable/disable traffic shaper * @rd_client : true if read client; false if write client * @client_id : client identifier * @bpc_denom : denominator of byte per clk * @bpc_numer : numerator of byte per clk */ struct traffic_shaper_cfg { … }; /** * struct split_pipe_cfg - pipe configuration for dual display panels * @en : Enable/disable dual pipe configuration * @mode : Panel interface mode * @intf : Interface id for main control path * @split_flush_en: Allows both the paths to be flushed when master path is * flushed */ struct split_pipe_cfg { … }; /** * struct dpu_danger_safe_status: danger and safe status signals * @mdp: top level status * @sspp: source pipe status */ struct dpu_danger_safe_status { … }; /** * struct dpu_vsync_source_cfg - configure vsync source and configure the * watchdog timers if required. * @pp_count: number of ping pongs active * @frame_rate: Display frame rate * @ppnumber: ping pong index array * @vsync_source: vsync source selection */ struct dpu_vsync_source_cfg { … }; /** * struct dpu_hw_mdp_ops - interface to the MDP TOP Hw driver functions * Assumption is these functions will be called after clocks are enabled. * @setup_split_pipe : Programs the pipe control registers * @setup_pp_split : Programs the pp split control registers * @setup_traffic_shaper : programs traffic shaper control */ struct dpu_hw_mdp_ops { … }; struct dpu_hw_mdp { … }; /** * dpu_hw_mdptop_init - initializes the top driver for the passed config * @dev: Corresponding device for devres management * @cfg: MDP TOP configuration from catalog * @addr: Mapped register io address of MDP * @m: Pointer to mdss catalog data */ struct dpu_hw_mdp *dpu_hw_mdptop_init(struct drm_device *dev, const struct dpu_mdp_cfg *cfg, void __iomem *addr, const struct dpu_mdss_cfg *m); void dpu_hw_mdp_destroy(struct dpu_hw_mdp *mdp); #endif /*_DPU_HW_TOP_H */