/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. */ #ifndef _DPU_HW_INTF_H #define _DPU_HW_INTF_H #include "dpu_hw_catalog.h" #include "dpu_hw_mdss.h" #include "dpu_hw_util.h" struct dpu_hw_intf; /* intf timing settings */ struct dpu_hw_intf_timing_params { … }; struct dpu_hw_intf_prog_fetch { … }; struct dpu_hw_intf_status { … }; struct dpu_hw_intf_cmd_mode_cfg { … }; /** * struct dpu_hw_intf_ops : Interface to the interface Hw driver functions * Assumption is these functions will be called after clocks are enabled * @ setup_timing_gen : programs the timing engine * @ setup_prog_fetch : enables/disables the programmable fetch logic * @ enable_timing: enable/disable timing engine * @ get_status: returns if timing engine is enabled or not * @ get_line_count: reads current vertical line counter * @bind_pingpong_blk: enable/disable the connection with pingpong which will * feed pixels to this interface * @setup_misr: enable/disable MISR * @collect_misr: read MISR signature * @enable_tearcheck: Enables vsync generation and sets up init value of read * pointer and programs the tear check configuration * @disable_tearcheck: Disables tearcheck block * @connect_external_te: Read, modify, write to either set or clear listening to external TE * Return: 1 if TE was originally connected, 0 if not, or -ERROR * @get_vsync_info: Provides the programmed and current line_count * @setup_autorefresh: Configure and enable the autorefresh config * @get_autorefresh: Retrieve autorefresh config from hardware * Return: 0 on success, -ETIMEDOUT on timeout * @vsync_sel: Select vsync signal for tear-effect configuration * @program_intf_cmd_cfg: Program the DPU to interface datapath for command mode */ struct dpu_hw_intf_ops { … }; struct dpu_hw_intf { … }; /** * dpu_hw_intf_init() - Initializes the INTF driver for the passed * interface catalog entry. * @dev: Corresponding device for devres management * @cfg: interface catalog entry for which driver object is required * @addr: mapped register io address of MDP * @mdss_rev: dpu core's major and minor versions */ struct dpu_hw_intf *dpu_hw_intf_init(struct drm_device *dev, const struct dpu_intf_cfg *cfg, void __iomem *addr, const struct dpu_mdss_version *mdss_rev); #endif /*_DPU_HW_INTF_H */
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