linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_cdm.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2023, The Linux Foundation. All rights reserved.
 */

#include <linux/bitfield.h>

#include <drm/drm_managed.h>

#include "dpu_hw_mdss.h"
#include "dpu_hw_util.h"
#include "dpu_hw_catalog.h"
#include "dpu_hw_cdm.h"
#include "dpu_kms.h"

#define CDM_CSC_10_OPMODE …
#define CDM_CSC_10_BASE …

#define CDM_CDWN2_OP_MODE …
#define CDM_CDWN2_CLAMP_OUT …
#define CDM_CDWN2_PARAMS_3D_0 …
#define CDM_CDWN2_PARAMS_3D_1 …
#define CDM_CDWN2_COEFF_COSITE_H_0 …
#define CDM_CDWN2_COEFF_COSITE_H_1 …
#define CDM_CDWN2_COEFF_COSITE_H_2 …
#define CDM_CDWN2_COEFF_OFFSITE_H_0 …
#define CDM_CDWN2_COEFF_OFFSITE_H_1 …
#define CDM_CDWN2_COEFF_OFFSITE_H_2 …
#define CDM_CDWN2_COEFF_COSITE_V …
#define CDM_CDWN2_COEFF_OFFSITE_V …
#define CDM_CDWN2_OUT_SIZE …

#define CDM_HDMI_PACK_OP_MODE …
#define CDM_CSC_10_MATRIX_COEFF_0 …

#define CDM_MUX …

/* CDM CDWN2 sub-block bit definitions */
#define CDM_CDWN2_OP_MODE_EN …
#define CDM_CDWN2_OP_MODE_ENABLE_H …
#define CDM_CDWN2_OP_MODE_ENABLE_V …
#define CDM_CDWN2_OP_MODE_BITS_OUT_8BIT …
#define CDM_CDWN2_V_PIXEL_METHOD_MASK …
#define CDM_CDWN2_H_PIXEL_METHOD_MASK …

/* CDM CSC10 sub-block bit definitions */
#define CDM_CSC10_OP_MODE_EN …
#define CDM_CSC10_OP_MODE_SRC_FMT_YUV …
#define CDM_CSC10_OP_MODE_DST_FMT_YUV …

/* CDM HDMI pack sub-block bit definitions */
#define CDM_HDMI_PACK_OP_MODE_EN …

/*
 * Horizontal coefficients for cosite chroma downscale
 * s13 representation of coefficients
 */
static u32 cosite_h_coeff[] = …;

/*
 * Horizontal coefficients for offsite chroma downscale
 */
static u32 offsite_h_coeff[] = …;

/*
 * Vertical coefficients for cosite chroma downscale
 */
static u32 cosite_v_coeff[] = …;
/*
 * Vertical coefficients for offsite chroma downscale
 */
static u32 offsite_v_coeff[] = …;

static int dpu_hw_cdm_setup_cdwn(struct dpu_hw_cdm *ctx, struct dpu_hw_cdm_cfg *cfg)
{ … }

static int dpu_hw_cdm_enable(struct dpu_hw_cdm *ctx, struct dpu_hw_cdm_cfg *cdm)
{ … }

static void dpu_hw_cdm_bind_pingpong_blk(struct dpu_hw_cdm *ctx, const enum dpu_pingpong pp)
{ … }

struct dpu_hw_cdm *dpu_hw_cdm_init(struct drm_device *dev,
				   const struct dpu_cdm_cfg *cfg, void __iomem *addr,
				   const struct dpu_mdss_version *mdss_rev)
{ … }