linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_dsc.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (c) 2020-2022, Linaro Limited
 */

#include <drm/drm_managed.h>

#include <drm/display/drm_dsc_helper.h>

#include "dpu_kms.h"
#include "dpu_hw_catalog.h"
#include "dpu_hwio.h"
#include "dpu_hw_mdss.h"
#include "dpu_hw_dsc.h"

#define DSC_COMMON_MODE …
#define DSC_ENC …
#define DSC_PICTURE …
#define DSC_SLICE …
#define DSC_CHUNK_SIZE …
#define DSC_DELAY …
#define DSC_SCALE_INITIAL …
#define DSC_SCALE_DEC_INTERVAL …
#define DSC_SCALE_INC_INTERVAL …
#define DSC_FIRST_LINE_BPG_OFFSET …
#define DSC_BPG_OFFSET …
#define DSC_DSC_OFFSET …
#define DSC_FLATNESS …
#define DSC_RC_MODEL_SIZE …
#define DSC_RC …
#define DSC_RC_BUF_THRESH …
#define DSC_RANGE_MIN_QP …
#define DSC_RANGE_MAX_QP …
#define DSC_RANGE_BPG_OFFSET …

#define DSC_CTL(m) …

static void dpu_hw_dsc_disable(struct dpu_hw_dsc *dsc)
{ … }

static void dpu_hw_dsc_config(struct dpu_hw_dsc *hw_dsc,
			      struct drm_dsc_config *dsc,
			      u32 mode,
			      u32 initial_lines)
{ … }

static void dpu_hw_dsc_config_thresh(struct dpu_hw_dsc *hw_dsc,
				     struct drm_dsc_config *dsc)
{ … }

static void dpu_hw_dsc_bind_pingpong_blk(
		struct dpu_hw_dsc *hw_dsc,
		const enum dpu_pingpong pp)
{ … }

static void _setup_dsc_ops(struct dpu_hw_dsc_ops *ops,
			   unsigned long cap)
{
	ops->dsc_disable = dpu_hw_dsc_disable;
	ops->dsc_config = dpu_hw_dsc_config;
	ops->dsc_config_thresh = dpu_hw_dsc_config_thresh;
	if (cap & BIT(DPU_DSC_OUTPUT_CTRL))
		ops->dsc_bind_pingpong_blk = dpu_hw_dsc_bind_pingpong_blk;
};

struct dpu_hw_dsc *dpu_hw_dsc_init(struct drm_device *dev,
				   const struct dpu_dsc_cfg *cfg,
				   void __iomem *addr)
{ … }