linux/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_interrupts.c

// SPDX-License-Identifier: GPL-2.0-only
/* Copyright (c) 2016-2018, The Linux Foundation. All rights reserved.
 */

#include <linux/bitops.h>
#include <linux/debugfs.h>
#include <linux/slab.h>

#include <drm/drm_managed.h>

#include "dpu_core_irq.h"
#include "dpu_kms.h"
#include "dpu_hw_interrupts.h"
#include "dpu_hw_util.h"
#include "dpu_hw_mdss.h"
#include "dpu_trace.h"

/*
 * Register offsets in MDSS register file for the interrupt registers
 * w.r.t. the MDP base
 */
#define MDP_INTF_OFF(intf) …
#define MDP_INTF_INTR_EN(intf) …
#define MDP_INTF_INTR_STATUS(intf) …
#define MDP_INTF_INTR_CLEAR(intf) …
#define MDP_INTF_TEAR_OFF(intf) …
#define MDP_INTF_INTR_TEAR_EN(intf) …
#define MDP_INTF_INTR_TEAR_STATUS(intf) …
#define MDP_INTF_INTR_TEAR_CLEAR(intf) …
#define MDP_AD4_OFF(ad4) …
#define MDP_AD4_INTR_EN_OFF(ad4) …
#define MDP_AD4_INTR_CLEAR_OFF(ad4) …
#define MDP_AD4_INTR_STATUS_OFF(ad4) …
#define MDP_INTF_REV_7xxx_OFF(intf) …
#define MDP_INTF_REV_7xxx_INTR_EN(intf) …
#define MDP_INTF_REV_7xxx_INTR_STATUS(intf) …
#define MDP_INTF_REV_7xxx_INTR_CLEAR(intf) …
#define MDP_INTF_REV_7xxx_TEAR_OFF(intf) …
#define MDP_INTF_REV_7xxx_INTR_TEAR_EN(intf) …
#define MDP_INTF_REV_7xxx_INTR_TEAR_STATUS(intf) …
#define MDP_INTF_REV_7xxx_INTR_TEAR_CLEAR(intf) …

/**
 * struct dpu_intr_reg - array of DPU register sets
 * @clr_off:	offset to CLEAR reg
 * @en_off:	offset to ENABLE reg
 * @status_off:	offset to STATUS reg
 */
struct dpu_intr_reg { … };

/*
 * dpu_intr_set_legacy -  List of DPU interrupt registers for DPU <= 6.x
 */
static const struct dpu_intr_reg dpu_intr_set_legacy[] = …;

/*
 * dpu_intr_set_7xxx -  List of DPU interrupt registers for DPU >= 7.0
 */
static const struct dpu_intr_reg dpu_intr_set_7xxx[] = …;

#define DPU_IRQ_MASK(irq_idx) …

static inline bool dpu_core_irq_is_valid(unsigned int irq_idx)
{ … }

static inline struct dpu_hw_intr_entry *dpu_core_irq_get_entry(struct dpu_hw_intr *intr,
							       unsigned int irq_idx)
{ … }

/**
 * dpu_core_irq_callback_handler - dispatch core interrupts
 * @dpu_kms:		Pointer to DPU's KMS structure
 * @irq_idx:		interrupt index
 */
static void dpu_core_irq_callback_handler(struct dpu_kms *dpu_kms, unsigned int irq_idx)
{ … }

irqreturn_t dpu_core_irq(struct msm_kms *kms)
{ … }

static int dpu_hw_intr_enable_irq_locked(struct dpu_hw_intr *intr,
					 unsigned int irq_idx)
{ … }

static int dpu_hw_intr_disable_irq_locked(struct dpu_hw_intr *intr,
					  unsigned int irq_idx)
{ … }

static void dpu_clear_irqs(struct dpu_kms *dpu_kms)
{ … }

static void dpu_disable_all_irqs(struct dpu_kms *dpu_kms)
{ … }

u32 dpu_core_irq_read(struct dpu_kms *dpu_kms,
		      unsigned int irq_idx)
{ … }

struct dpu_hw_intr *dpu_hw_intr_init(struct drm_device *dev,
				     void __iomem *addr,
				     const struct dpu_mdss_cfg *m)
{ … }

int dpu_core_irq_register_callback(struct dpu_kms *dpu_kms,
				   unsigned int irq_idx,
				   void (*irq_cb)(void *arg),
				   void *irq_arg)
{ … }

int dpu_core_irq_unregister_callback(struct dpu_kms *dpu_kms,
				     unsigned int irq_idx)
{ … }

#ifdef CONFIG_DEBUG_FS
static int dpu_debugfs_core_irq_show(struct seq_file *s, void *v)
{ … }

DEFINE_SHOW_ATTRIBUTE(…);

void dpu_debugfs_core_irq_init(struct dpu_kms *dpu_kms,
		struct dentry *parent)
{ … }
#endif

void dpu_core_irq_preinstall(struct msm_kms *kms)
{ … }

void dpu_core_irq_uninstall(struct msm_kms *kms)
{ … }