linux/drivers/gpu/drm/msm/msm_mdss.c

/*
 * SPDX-License-Identifier: GPL-2.0
 * Copyright (c) 2018, The Linux Foundation
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/interconnect.h>
#include <linux/irq.h>
#include <linux/irqchip.h>
#include <linux/irqdesc.h>
#include <linux/irqchip/chained_irq.h>
#include <linux/of_platform.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/reset.h>

#include "msm_mdss.h"
#include "msm_kms.h"

#define HW_REV
#define HW_INTR_STATUS

#define UBWC_DEC_HW_VERSION
#define UBWC_STATIC
#define UBWC_CTRL_2
#define UBWC_PREDICTION_MODE

#define MIN_IB_BW

#define DEFAULT_REG_BW

struct msm_mdss {};

static int msm_mdss_parse_data_bus_icc_path(struct device *dev,
					    struct msm_mdss *msm_mdss)
{}

static void msm_mdss_irq(struct irq_desc *desc)
{}

static void msm_mdss_irq_mask(struct irq_data *irqd)
{}

static void msm_mdss_irq_unmask(struct irq_data *irqd)
{}

static struct irq_chip msm_mdss_irq_chip =;

static struct lock_class_key msm_mdss_lock_key, msm_mdss_request_key;

static int msm_mdss_irqdomain_map(struct irq_domain *domain,
		unsigned int irq, irq_hw_number_t hwirq)
{}

static const struct irq_domain_ops msm_mdss_irqdomain_ops =;

static int _msm_mdss_irq_domain_add(struct msm_mdss *msm_mdss)
{}

static void msm_mdss_setup_ubwc_dec_20(struct msm_mdss *msm_mdss)
{}

static void msm_mdss_setup_ubwc_dec_30(struct msm_mdss *msm_mdss)
{}

static void msm_mdss_setup_ubwc_dec_40(struct msm_mdss *msm_mdss)
{}

#define MDSS_HW_MAJ_MIN

#define MDSS_HW_MSM8996
#define MDSS_HW_MSM8937
#define MDSS_HW_MSM8953
#define MDSS_HW_MSM8998
#define MDSS_HW_SDM660
#define MDSS_HW_SDM630

/*
 * MDP5 platforms use generic qcom,mdp5 compat string, so we have to generate this data
 */
static const struct msm_mdss_data *msm_mdss_generate_mdp5_mdss_data(struct msm_mdss *mdss)
{}

const struct msm_mdss_data *msm_mdss_get_mdss_data(struct device *dev)
{}

static int msm_mdss_enable(struct msm_mdss *msm_mdss)
{}

static int msm_mdss_disable(struct msm_mdss *msm_mdss)
{}

static void msm_mdss_destroy(struct msm_mdss *msm_mdss)
{}

static int msm_mdss_reset(struct device *dev)
{}

/*
 * MDP5 MDSS uses at most three specified clocks.
 */
#define MDP5_MDSS_NUM_CLOCKS
static int mdp5_mdss_parse_clock(struct platform_device *pdev, struct clk_bulk_data **clocks)
{}

static struct msm_mdss *msm_mdss_init(struct platform_device *pdev, bool is_mdp5)
{}

static int __maybe_unused mdss_runtime_suspend(struct device *dev)
{}

static int __maybe_unused mdss_runtime_resume(struct device *dev)
{}

static int __maybe_unused mdss_pm_suspend(struct device *dev)
{}

static int __maybe_unused mdss_pm_resume(struct device *dev)
{}

static const struct dev_pm_ops mdss_pm_ops =;

static int mdss_probe(struct platform_device *pdev)
{}

static void mdss_remove(struct platform_device *pdev)
{}

static const struct msm_mdss_data msm8998_data =;

static const struct msm_mdss_data qcm2290_data =;

static const struct msm_mdss_data sc7180_data =;

static const struct msm_mdss_data sc7280_data =;

static const struct msm_mdss_data sc8180x_data =;

static const struct msm_mdss_data sc8280xp_data =;

static const struct msm_mdss_data sdm670_data =;

static const struct msm_mdss_data sdm845_data =;

static const struct msm_mdss_data sm6350_data =;

static const struct msm_mdss_data sm7150_data =;

static const struct msm_mdss_data sm8150_data =;

static const struct msm_mdss_data sm6115_data =;

static const struct msm_mdss_data sm6125_data =;

static const struct msm_mdss_data sm8250_data =;

static const struct msm_mdss_data sm8350_data =;

static const struct msm_mdss_data sm8550_data =;

static const struct msm_mdss_data x1e80100_data =;

static const struct of_device_id mdss_dt_match[] =;
MODULE_DEVICE_TABLE(of, mdss_dt_match);

static struct platform_driver mdss_platform_driver =;

void __init msm_mdss_register(void)
{}

void __exit msm_mdss_unregister(void)
{}