linux/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2014-2018 The Linux Foundation. All rights reserved.
 * Copyright (C) 2013 Red Hat
 * Author: Rob Clark <[email protected]>
 */

#define pr_fmt(fmt)

#include <linux/debugfs.h>
#include <linux/dma-buf.h>

#include <drm/drm_atomic.h>
#include <drm/drm_atomic_uapi.h>
#include <drm/drm_blend.h>
#include <drm/drm_damage_helper.h>
#include <drm/drm_framebuffer.h>
#include <drm/drm_gem_atomic_helper.h>

#include "msm_drv.h"
#include "msm_mdss.h"
#include "dpu_kms.h"
#include "dpu_formats.h"
#include "dpu_hw_sspp.h"
#include "dpu_hw_util.h"
#include "dpu_trace.h"
#include "dpu_crtc.h"
#include "dpu_vbif.h"
#include "dpu_plane.h"

#define DPU_DEBUG_PLANE(pl, fmt, ...)

#define DPU_ERROR_PLANE(pl, fmt, ...)

#define DECIMATED_DIMENSION(dim, deci)
#define PHASE_STEP_SHIFT
#define PHASE_STEP_UNIT_SCALE
#define PHASE_RESIDUAL

#define SHARP_STRENGTH_DEFAULT
#define SHARP_EDGE_THR_DEFAULT
#define SHARP_SMOOTH_THR_DEFAULT
#define SHARP_NOISE_THR_DEFAULT

#define DPU_PLANE_COLOR_FILL_FLAG
#define DPU_ZPOS_MAX

/*
 * Default Preload Values
 */
#define DPU_QSEED3_DEFAULT_PRELOAD_H
#define DPU_QSEED3_DEFAULT_PRELOAD_V
#define DPU_QSEED4_DEFAULT_PRELOAD_V
#define DPU_QSEED4_DEFAULT_PRELOAD_H

#define DEFAULT_REFRESH_RATE

static const uint32_t qcom_compressed_supported_formats[] =;

/*
 * struct dpu_plane - local dpu plane structure
 * @aspace: address space pointer
 * @csc_ptr: Points to dpu_csc_cfg structure to use for current
 * @catalog: Points to dpu catalog structure
 * @revalidate: force revalidation of all the plane properties
 */
struct dpu_plane {};

static const uint64_t supported_format_modifiers[] =;

#define to_dpu_plane(x)

static struct dpu_kms *_dpu_plane_get_kms(struct drm_plane *plane)
{}

/**
 * _dpu_plane_calc_bw - calculate bandwidth required for a plane
 * @catalog: Points to dpu catalog structure
 * @fmt: Pointer to source buffer format
 * @mode: Pointer to drm display mode
 * @pipe_cfg: Pointer to pipe configuration
 * Result: Updates calculated bandwidth in the plane state.
 * BW Equation: src_w * src_h * bpp * fps * (v_total / v_dest)
 * Prefill BW Equation: line src bytes * line_time
 */
static u64 _dpu_plane_calc_bw(const struct dpu_mdss_cfg *catalog,
	const struct msm_format *fmt,
	const struct drm_display_mode *mode,
	struct dpu_sw_pipe_cfg *pipe_cfg)
{}

/**
 * _dpu_plane_calc_clk - calculate clock required for a plane
 * @mode: Pointer to drm display mode
 * @pipe_cfg: Pointer to pipe configuration
 * Result: Updates calculated clock in the plane state.
 * Clock equation: dst_w * v_total * fps * (src_h / dst_h)
 */
static u64 _dpu_plane_calc_clk(const struct drm_display_mode *mode,
		struct dpu_sw_pipe_cfg *pipe_cfg)
{}

/**
 * _dpu_plane_calc_fill_level - calculate fill level of the given source format
 * @plane:		Pointer to drm plane
 * @pipe:		Pointer to software pipe
 * @lut_usage:		LUT usecase
 * @fmt:		Pointer to source buffer format
 * @src_width:		width of source buffer
 * Return: fill level corresponding to the source buffer/format or 0 if error
 */
static int _dpu_plane_calc_fill_level(struct drm_plane *plane,
		struct dpu_sw_pipe *pipe,
		enum dpu_qos_lut_usage lut_usage,
		const struct msm_format *fmt, u32 src_width)
{}

/**
 * _dpu_plane_set_qos_lut - set QoS LUT of the given plane
 * @plane:		Pointer to drm plane
 * @pipe:		Pointer to software pipe
 * @fmt:		Pointer to source buffer format
 * @pipe_cfg:		Pointer to pipe configuration
 */
static void _dpu_plane_set_qos_lut(struct drm_plane *plane,
		struct dpu_sw_pipe *pipe,
		const struct msm_format *fmt, struct dpu_sw_pipe_cfg *pipe_cfg)
{}

/**
 * _dpu_plane_set_qos_ctrl - set QoS control of the given plane
 * @plane:		Pointer to drm plane
 * @pipe:		Pointer to software pipe
 * @enable:		true to enable QoS control
 */
static void _dpu_plane_set_qos_ctrl(struct drm_plane *plane,
	struct dpu_sw_pipe *pipe,
	bool enable)
{}

static bool _dpu_plane_sspp_clk_force_ctrl(struct dpu_hw_sspp *sspp,
					   struct dpu_hw_mdp *mdp,
					   bool enable, bool *forced_on)
{}

/**
 * _dpu_plane_set_ot_limit - set OT limit for the given plane
 * @plane:		Pointer to drm plane
 * @pipe:		Pointer to software pipe
 * @pipe_cfg:		Pointer to pipe configuration
 * @frame_rate:		CRTC's frame rate
 */
static void _dpu_plane_set_ot_limit(struct drm_plane *plane,
		struct dpu_sw_pipe *pipe,
		struct dpu_sw_pipe_cfg *pipe_cfg,
		int frame_rate)
{}

/**
 * _dpu_plane_set_qos_remap - set vbif QoS for the given plane
 * @plane:		Pointer to drm plane
 * @pipe:		Pointer to software pipe
 */
static void _dpu_plane_set_qos_remap(struct drm_plane *plane,
		struct dpu_sw_pipe *pipe)
{}

static void _dpu_plane_setup_scaler3(struct dpu_hw_sspp *pipe_hw,
		uint32_t src_w, uint32_t src_h, uint32_t dst_w, uint32_t dst_h,
		struct dpu_hw_scaler3_cfg *scale_cfg,
		const struct msm_format *fmt,
		uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v,
		unsigned int rotation)
{}

static void _dpu_plane_setup_pixel_ext(struct dpu_hw_scaler3_cfg *scale_cfg,
				struct dpu_hw_pixel_ext *pixel_ext,
				uint32_t src_w, uint32_t src_h,
				uint32_t chroma_subsmpl_h, uint32_t chroma_subsmpl_v)
{}

static const struct dpu_csc_cfg *_dpu_plane_get_csc(struct dpu_sw_pipe *pipe,
						    const struct msm_format *fmt)
{}

static void _dpu_plane_setup_scaler(struct dpu_sw_pipe *pipe,
		const struct msm_format *fmt, bool color_fill,
		struct dpu_sw_pipe_cfg *pipe_cfg,
		unsigned int rotation)
{}

static void _dpu_plane_color_fill_pipe(struct dpu_plane_state *pstate,
				       struct dpu_sw_pipe *pipe,
				       struct drm_rect *dst_rect,
				       u32 fill_color,
				       const struct msm_format *fmt)
{}

/**
 * _dpu_plane_color_fill - enables color fill on plane
 * @pdpu:   Pointer to DPU plane object
 * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
 * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
 */
static void _dpu_plane_color_fill(struct dpu_plane *pdpu,
		uint32_t color, uint32_t alpha)
{}

static int dpu_plane_prepare_fb(struct drm_plane *plane,
		struct drm_plane_state *new_state)
{}

static void dpu_plane_cleanup_fb(struct drm_plane *plane,
		struct drm_plane_state *old_state)
{}

static int dpu_plane_check_inline_rotation(struct dpu_plane *pdpu,
						const struct dpu_sspp_sub_blks *sblk,
						struct drm_rect src, const struct msm_format *fmt)
{}

static int dpu_plane_atomic_check_pipe(struct dpu_plane *pdpu,
		struct dpu_sw_pipe *pipe,
		struct dpu_sw_pipe_cfg *pipe_cfg,
		const struct msm_format *fmt,
		const struct drm_display_mode *mode)
{}

static int dpu_plane_atomic_check(struct drm_plane *plane,
				  struct drm_atomic_state *state)
{}

static void dpu_plane_flush_csc(struct dpu_plane *pdpu, struct dpu_sw_pipe *pipe)
{}

void dpu_plane_flush(struct drm_plane *plane)
{}

/**
 * dpu_plane_set_error: enable/disable error condition
 * @plane: pointer to drm_plane structure
 * @error: error value to set
 */
void dpu_plane_set_error(struct drm_plane *plane, bool error)
{}

static void dpu_plane_sspp_update_pipe(struct drm_plane *plane,
				       struct dpu_sw_pipe *pipe,
				       struct dpu_sw_pipe_cfg *pipe_cfg,
				       const struct msm_format *fmt,
				       int frame_rate,
				       struct dpu_hw_fmt_layout *layout)
{}

static void dpu_plane_sspp_atomic_update(struct drm_plane *plane)
{}

static void _dpu_plane_atomic_disable(struct drm_plane *plane)
{}

static void dpu_plane_atomic_update(struct drm_plane *plane,
				struct drm_atomic_state *state)
{}

static void dpu_plane_destroy_state(struct drm_plane *plane,
		struct drm_plane_state *state)
{}

static struct drm_plane_state *
dpu_plane_duplicate_state(struct drm_plane *plane)
{}

static const char * const multirect_mode_name[] =;

static const char * const multirect_index_name[] =;

static const char *dpu_get_multirect_mode(enum dpu_sspp_multirect_mode mode)
{}

static const char *dpu_get_multirect_index(enum dpu_sspp_multirect_index index)
{}

static void dpu_plane_atomic_print_state(struct drm_printer *p,
		const struct drm_plane_state *state)
{}

static void dpu_plane_reset(struct drm_plane *plane)
{}

#ifdef CONFIG_DEBUG_FS
void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable)
{}
#endif

static bool dpu_plane_format_mod_supported(struct drm_plane *plane,
		uint32_t format, uint64_t modifier)
{}

static const struct drm_plane_funcs dpu_plane_funcs =;

static const struct drm_plane_helper_funcs dpu_plane_helper_funcs =;

/* initialize plane */
struct drm_plane *dpu_plane_init(struct drm_device *dev,
		uint32_t pipe, enum drm_plane_type type,
		unsigned long possible_crtcs)
{}