// SPDX-License-Identifier: GPL-2.0-only /* * Copyright (c) 2015, The Linux Foundation. All rights reserved. */ #include <linux/clk.h> #include <linux/delay.h> #include <linux/dma-mapping.h> #include <linux/err.h> #include <linux/interrupt.h> #include <linux/mfd/syscon.h> #include <linux/of.h> #include <linux/of_graph.h> #include <linux/of_irq.h> #include <linux/pinctrl/consumer.h> #include <linux/pm_opp.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <linux/spinlock.h> #include <video/mipi_display.h> #include <drm/display/drm_dsc_helper.h> #include <drm/drm_of.h> #include "dsi.h" #include "dsi.xml.h" #include "sfpb.xml.h" #include "dsi_cfg.h" #include "msm_dsc_helper.h" #include "msm_kms.h" #include "msm_gem.h" #include "phy/dsi_phy.h" #define DSI_RESET_TOGGLE_DELAY_MS … static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc); static int dsi_get_version(const void __iomem *base, u32 *major, u32 *minor) { … } #define DSI_ERR_STATE_ACK … #define DSI_ERR_STATE_TIMEOUT … #define DSI_ERR_STATE_DLN0_PHY … #define DSI_ERR_STATE_FIFO … #define DSI_ERR_STATE_MDP_FIFO_UNDERFLOW … #define DSI_ERR_STATE_INTERLEAVE_OP_CONTENTION … #define DSI_ERR_STATE_PLL_UNLOCKED … #define DSI_CLK_CTRL_ENABLE_CLKS … struct msm_dsi_host { … }; static inline u32 dsi_read(struct msm_dsi_host *msm_host, u32 reg) { … } static inline void dsi_write(struct msm_dsi_host *msm_host, u32 reg, u32 data) { … } static const struct msm_dsi_cfg_handler *dsi_get_config( struct msm_dsi_host *msm_host) { … } static inline struct msm_dsi_host *to_msm_dsi_host(struct mipi_dsi_host *host) { … } int dsi_clk_init_v2(struct msm_dsi_host *msm_host) { … } int dsi_clk_init_6g_v2(struct msm_dsi_host *msm_host) { … } static int dsi_clk_init(struct msm_dsi_host *msm_host) { … } int msm_dsi_runtime_suspend(struct device *dev) { … } int msm_dsi_runtime_resume(struct device *dev) { … } int dsi_link_clk_set_rate_6g(struct msm_dsi_host *msm_host) { … } int dsi_link_clk_enable_6g(struct msm_dsi_host *msm_host) { … } int dsi_link_clk_set_rate_v2(struct msm_dsi_host *msm_host) { … } int dsi_link_clk_enable_v2(struct msm_dsi_host *msm_host) { … } void dsi_link_clk_disable_6g(struct msm_dsi_host *msm_host) { … } void dsi_link_clk_disable_v2(struct msm_dsi_host *msm_host) { … } /** * dsi_adjust_pclk_for_compression() - Adjust the pclk rate for compression case * @mode: The selected mode for the DSI output * @dsc: DRM DSC configuration for this DSI output * * Adjust the pclk rate by calculating a new hdisplay proportional to * the compression ratio such that: * new_hdisplay = old_hdisplay * compressed_bpp / uncompressed_bpp * * Porches do not need to be adjusted: * - For VIDEO mode they are not compressed by DSC and are passed as is. * - For CMD mode there are no actual porches. Instead these fields * currently represent the overhead to the image data transfer. As such, they * are calculated for the final mode parameters (after the compression) and * are not to be adjusted too. * * FIXME: Reconsider this if/when CMD mode handling is rewritten to use * transfer time and data overhead as a starting point of the calculations. */ static unsigned long dsi_adjust_pclk_for_compression(const struct drm_display_mode *mode, const struct drm_dsc_config *dsc) { … } static unsigned long dsi_get_pclk_rate(const struct drm_display_mode *mode, const struct drm_dsc_config *dsc, bool is_bonded_dsi) { … } unsigned long dsi_byte_clk_get_rate(struct mipi_dsi_host *host, bool is_bonded_dsi, const struct drm_display_mode *mode) { … } static void dsi_calc_pclk(struct msm_dsi_host *msm_host, bool is_bonded_dsi) { … } int dsi_calc_clk_rate_6g(struct msm_dsi_host *msm_host, bool is_bonded_dsi) { … } int dsi_calc_clk_rate_v2(struct msm_dsi_host *msm_host, bool is_bonded_dsi) { … } static void dsi_intr_ctrl(struct msm_dsi_host *msm_host, u32 mask, int enable) { … } static inline enum dsi_traffic_mode dsi_get_traffic_mode(const u32 mode_flags) { … } static inline enum dsi_vid_dst_format dsi_get_vid_fmt( const enum mipi_dsi_pixel_format mipi_fmt) { … } static inline enum dsi_cmd_dst_format dsi_get_cmd_fmt( const enum mipi_dsi_pixel_format mipi_fmt) { … } static void dsi_ctrl_disable(struct msm_dsi_host *msm_host) { … } bool msm_dsi_host_is_wide_bus_enabled(struct mipi_dsi_host *host) { … } static void dsi_ctrl_enable(struct msm_dsi_host *msm_host, struct msm_dsi_phy_shared_timings *phy_shared_timings, struct msm_dsi_phy *phy) { … } static void dsi_update_dsc_timing(struct msm_dsi_host *msm_host, bool is_cmd_mode, u32 hdisplay) { … } static void dsi_timing_setup(struct msm_dsi_host *msm_host, bool is_bonded_dsi) { … } static void dsi_sw_reset(struct msm_dsi_host *msm_host) { … } static void dsi_op_mode_config(struct msm_dsi_host *msm_host, bool video_mode, bool enable) { … } static void dsi_set_tx_power_mode(int mode, struct msm_dsi_host *msm_host) { … } static void dsi_wait4video_done(struct msm_dsi_host *msm_host) { … } static void dsi_wait4video_eng_busy(struct msm_dsi_host *msm_host) { … } int dsi_tx_buf_alloc_6g(struct msm_dsi_host *msm_host, int size) { … } int dsi_tx_buf_alloc_v2(struct msm_dsi_host *msm_host, int size) { … } void msm_dsi_tx_buf_free(struct mipi_dsi_host *host) { … } void *dsi_tx_buf_get_6g(struct msm_dsi_host *msm_host) { … } void *dsi_tx_buf_get_v2(struct msm_dsi_host *msm_host) { … } void dsi_tx_buf_put_6g(struct msm_dsi_host *msm_host) { … } /* * prepare cmd buffer to be txed */ static int dsi_cmd_dma_add(struct msm_dsi_host *msm_host, const struct mipi_dsi_msg *msg) { … } /* * dsi_short_read1_resp: 1 parameter */ static int dsi_short_read1_resp(u8 *buf, const struct mipi_dsi_msg *msg) { … } /* * dsi_short_read2_resp: 2 parameter */ static int dsi_short_read2_resp(u8 *buf, const struct mipi_dsi_msg *msg) { … } static int dsi_long_read_resp(u8 *buf, const struct mipi_dsi_msg *msg) { … } int dsi_dma_base_get_6g(struct msm_dsi_host *msm_host, uint64_t *dma_base) { … } int dsi_dma_base_get_v2(struct msm_dsi_host *msm_host, uint64_t *dma_base) { … } static int dsi_cmd_dma_tx(struct msm_dsi_host *msm_host, int len) { … } static int dsi_cmd_dma_rx(struct msm_dsi_host *msm_host, u8 *buf, int rx_byte, int pkt_size) { … } static int dsi_cmds2buf_tx(struct msm_dsi_host *msm_host, const struct mipi_dsi_msg *msg) { … } static void dsi_err_worker(struct work_struct *work) { … } static void dsi_ack_err_status(struct msm_dsi_host *msm_host) { … } static void dsi_timeout_status(struct msm_dsi_host *msm_host) { … } static void dsi_dln0_phy_err(struct msm_dsi_host *msm_host) { … } static void dsi_fifo_status(struct msm_dsi_host *msm_host) { … } static void dsi_status(struct msm_dsi_host *msm_host) { … } static void dsi_clk_status(struct msm_dsi_host *msm_host) { … } static void dsi_error(struct msm_dsi_host *msm_host) { … } static irqreturn_t dsi_host_irq(int irq, void *ptr) { … } static int dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi) { … } static int dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *dsi) { … } static ssize_t dsi_host_transfer(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } static const struct mipi_dsi_host_ops dsi_host_ops = …; /* * List of supported physical to logical lane mappings. * For example, the 2nd entry represents the following mapping: * * "3012": Logic 3->Phys 0; Logic 0->Phys 1; Logic 1->Phys 2; Logic 2->Phys 3; */ static const int supported_data_lane_swaps[][4] = …; static int dsi_host_parse_lane_data(struct msm_dsi_host *msm_host, struct device_node *ep) { … } static int dsi_populate_dsc_params(struct msm_dsi_host *msm_host, struct drm_dsc_config *dsc) { … } static int dsi_host_parse_dt(struct msm_dsi_host *msm_host) { … } static int dsi_host_get_id(struct msm_dsi_host *msm_host) { … } int msm_dsi_host_init(struct msm_dsi *msm_dsi) { … } void msm_dsi_host_destroy(struct mipi_dsi_host *host) { … } int msm_dsi_host_modeset_init(struct mipi_dsi_host *host, struct drm_device *dev) { … } int msm_dsi_host_register(struct mipi_dsi_host *host) { … } void msm_dsi_host_unregister(struct mipi_dsi_host *host) { … } int msm_dsi_host_xfer_prepare(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } void msm_dsi_host_xfer_restore(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } int msm_dsi_host_cmd_tx(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } int msm_dsi_host_cmd_rx(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } void msm_dsi_host_cmd_xfer_commit(struct mipi_dsi_host *host, u32 dma_base, u32 len) { … } void msm_dsi_host_set_phy_mode(struct mipi_dsi_host *host, struct msm_dsi_phy *src_phy) { … } void msm_dsi_host_reset_phy(struct mipi_dsi_host *host) { … } void msm_dsi_host_get_phy_clk_req(struct mipi_dsi_host *host, struct msm_dsi_phy_clk_request *clk_req, bool is_bonded_dsi) { … } void msm_dsi_host_enable_irq(struct mipi_dsi_host *host) { … } void msm_dsi_host_disable_irq(struct mipi_dsi_host *host) { … } int msm_dsi_host_enable(struct mipi_dsi_host *host) { … } int msm_dsi_host_disable(struct mipi_dsi_host *host) { … } static void msm_dsi_sfpb_config(struct msm_dsi_host *msm_host, bool enable) { … } int msm_dsi_host_power_on(struct mipi_dsi_host *host, struct msm_dsi_phy_shared_timings *phy_shared_timings, bool is_bonded_dsi, struct msm_dsi_phy *phy) { … } int msm_dsi_host_power_off(struct mipi_dsi_host *host) { … } int msm_dsi_host_set_display_mode(struct mipi_dsi_host *host, const struct drm_display_mode *mode) { … } enum drm_mode_status msm_dsi_host_check_dsc(struct mipi_dsi_host *host, const struct drm_display_mode *mode) { … } unsigned long msm_dsi_host_get_mode_flags(struct mipi_dsi_host *host) { … } void msm_dsi_host_snapshot(struct msm_disp_state *disp_state, struct mipi_dsi_host *host) { … } static void msm_dsi_host_video_test_pattern_setup(struct msm_dsi_host *msm_host) { … } static void msm_dsi_host_cmd_test_pattern_setup(struct msm_dsi_host *msm_host) { … } void msm_dsi_host_test_pattern_en(struct mipi_dsi_host *host) { … } struct drm_dsc_config *msm_dsi_host_get_dsc_config(struct mipi_dsi_host *host) { … }
Codebase Browser
linux