/* SPDX-License-Identifier: GPL-2.0-only */ /* * Copyright (C) 2013 NVIDIA Corporation */ #ifndef TEGRA_GR3D_H #define TEGRA_GR3D_H #define GR3D_IDX_ATTRIBUTE(x) … #define GR3D_IDX_INDEX_BASE … #define GR3D_QR_ZTAG_ADDR … #define GR3D_QR_CTAG_ADDR … #define GR3D_QR_CZ_ADDR … #define GR3D_TEX_TEX_ADDR(x) … #define GR3D_DW_MEMORY_OUTPUT_ADDRESS … #define GR3D_GLOBAL_SURFADDR(x) … #define GR3D_GLOBAL_SPILLSURFADDR … #define GR3D_GLOBAL_SURFOVERADDR(x) … #define GR3D_GLOBAL_SAMP01SURFADDR(x) … #define GR3D_GLOBAL_SAMP23SURFADDR(x) … #define GR3D_NUM_REGS … #endif