#include <drm/drm_atomic_helper.h>
#include <drm/drm_of.h>
#include <drm/drm_print.h>
#include <drm/drm_mipi_dsi.h>
#include <linux/bitfield.h>
#include <linux/bits.h>
#include <linux/clk.h>
#include <linux/delay.h>
#include <linux/gpio/consumer.h>
#include <linux/i2c.h>
#include <linux/media-bus-format.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/regmap.h>
#include <linux/regulator/consumer.h>
#define VENDOR_ID …
#define DEVICE_ID_H …
#define DEVICE_ID_L …
#define VERSION_ID …
#define FIRMWARE_VERSION …
#define CONFIG_FINISH …
#define PD_CTRL(n) …
#define RST_CTRL(n) …
#define SYS_CTRL(n) …
#define SYS_CTRL_1_CLK_PHASE_MSK …
#define CLK_PHASE_0 …
#define CLK_PHASE_1_4 …
#define CLK_PHASE_1_2 …
#define CLK_PHASE_3_4 …
#define RGB_DRV(n) …
#define RGB_DLY(n) …
#define RGB_TEST_CTRL …
#define ATE_PLL_EN …
#define HACTIVE_LI …
#define VACTIVE_LI …
#define VACTIVE_HACTIVE_HI …
#define HFP_LI …
#define HSYNC_LI …
#define HBP_LI …
#define HFP_HSW_HBP_HI …
#define HFP_HSW_HBP_HI_HFP(n) …
#define HFP_HSW_HBP_HI_HS(n) …
#define HFP_HSW_HBP_HI_HBP(n) …
#define VFP …
#define VSYNC …
#define VBP …
#define BIST_POL …
#define BIST_POL_BIST_MODE(n) …
#define BIST_POL_BIST_GEN …
#define BIST_POL_HSYNC_POL …
#define BIST_POL_VSYNC_POL …
#define BIST_POL_DE_POL …
#define BIST_RED …
#define BIST_GREEN …
#define BIST_BLUE …
#define BIST_CHESS_X …
#define BIST_CHESS_Y …
#define BIST_CHESS_XY_H …
#define BIST_FRAME_TIME_L …
#define BIST_FRAME_TIME_H …
#define FIFO_MAX_ADDR_LOW …
#define SYNC_EVENT_DLY …
#define HSW_MIN …
#define HFP_MIN …
#define LOGIC_RST_NUM …
#define OSC_CTRL(n) …
#define BG_CTRL …
#define LDO_PLL …
#define PLL_CTRL(n) …
#define PLL_CTRL_6_EXTERNAL …
#define PLL_CTRL_6_MIPI_CLK …
#define PLL_CTRL_6_INTERNAL …
#define PLL_REM(n) …
#define PLL_DIV(n) …
#define PLL_FRAC(n) …
#define PLL_INT(n) …
#define PLL_REF_DIV …
#define PLL_REF_DIV_P(n) …
#define PLL_REF_DIV_Pe …
#define PLL_REF_DIV_S(n) …
#define PLL_SSC_P(n) …
#define PLL_SSC_STEP(n) …
#define PLL_SSC_OFFSET(n) …
#define GPIO_OEN …
#define MIPI_CFG_PW …
#define MIPI_CFG_PW_CONFIG_DSI …
#define MIPI_CFG_PW_CONFIG_I2C …
#define GPIO_SEL(n) …
#define IRQ_SEL …
#define DBG_SEL …
#define DBG_SIGNAL …
#define MIPI_ERR_VECTOR_L …
#define MIPI_ERR_VECTOR_H …
#define MIPI_ERR_VECTOR_EN_L …
#define MIPI_ERR_VECTOR_EN_H …
#define MIPI_MAX_SIZE_L …
#define MIPI_MAX_SIZE_H …
#define DSI_CTRL …
#define DSI_CTRL_UNKNOWN …
#define DSI_CTRL_DSI_LANES(n) …
#define MIPI_PN_SWAP …
#define MIPI_PN_SWAP_CLK …
#define MIPI_PN_SWAP_D(n) …
#define MIPI_SOT_SYNC_BIT(n) …
#define MIPI_ULPS_CTRL …
#define MIPI_CLK_CHK_VAR …
#define MIPI_CLK_CHK_INI …
#define MIPI_T_TERM_EN …
#define MIPI_T_HS_SETTLE …
#define MIPI_T_TA_SURE_PRE …
#define MIPI_T_LPX_SET …
#define MIPI_T_CLK_MISS …
#define MIPI_INIT_TIME_L …
#define MIPI_INIT_TIME_H …
#define MIPI_T_CLK_TERM_EN …
#define MIPI_T_CLK_SETTLE …
#define MIPI_TO_HS_RX_L …
#define MIPI_TO_HS_RX_H …
#define MIPI_PHY(n) …
#define MIPI_PD_RX …
#define MIPI_PD_TERM …
#define MIPI_PD_HSRX …
#define MIPI_PD_LPTX …
#define MIPI_PD_LPRX …
#define MIPI_PD_CK_LANE …
#define MIPI_FORCE_0 …
#define MIPI_RST_CTRL …
#define MIPI_RST_NUM …
#define MIPI_DBG_SET(n) …
#define MIPI_DBG_SEL …
#define MIPI_DBG_DATA …
#define MIPI_ATE_TEST_SEL …
#define MIPI_ATE_STATUS(n) …
struct chipone { … };
static const struct regmap_range chipone_dsi_readable_ranges[] = …;
static const struct regmap_access_table chipone_dsi_readable_table = …;
static const struct regmap_range chipone_dsi_writeable_ranges[] = …;
static const struct regmap_access_table chipone_dsi_writeable_table = …;
static const struct regmap_config chipone_regmap_config = …;
static int chipone_dsi_read(void *context,
const void *reg, size_t reg_size,
void *val, size_t val_size)
{ … }
static int chipone_dsi_write(void *context, const void *data, size_t count)
{ … }
static const struct regmap_bus chipone_dsi_regmap_bus = …;
static inline struct chipone *bridge_to_chipone(struct drm_bridge *bridge)
{ … }
static void chipone_readb(struct chipone *icn, u8 reg, u8 *val)
{ … }
static int chipone_writeb(struct chipone *icn, u8 reg, u8 val)
{ … }
static void chipone_configure_pll(struct chipone *icn,
const struct drm_display_mode *mode)
{ … }
static void chipone_atomic_enable(struct drm_bridge *bridge,
struct drm_bridge_state *old_bridge_state)
{ … }
static void chipone_atomic_pre_enable(struct drm_bridge *bridge,
struct drm_bridge_state *old_bridge_state)
{ … }
static void chipone_atomic_post_disable(struct drm_bridge *bridge,
struct drm_bridge_state *old_bridge_state)
{ … }
static void chipone_mode_set(struct drm_bridge *bridge,
const struct drm_display_mode *mode,
const struct drm_display_mode *adjusted_mode)
{
struct chipone *icn = bridge_to_chipone(bridge);
drm_mode_copy(&icn->mode, adjusted_mode);
};
static int chipone_dsi_attach(struct chipone *icn)
{ … }
static int chipone_dsi_host_attach(struct chipone *icn)
{ … }
static int chipone_attach(struct drm_bridge *bridge, enum drm_bridge_attach_flags flags)
{ … }
#define MAX_INPUT_SEL_FORMATS …
static u32 *
chipone_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
struct drm_bridge_state *bridge_state,
struct drm_crtc_state *crtc_state,
struct drm_connector_state *conn_state,
u32 output_fmt,
unsigned int *num_input_fmts)
{ … }
static const struct drm_bridge_funcs chipone_bridge_funcs = …;
static int chipone_parse_dt(struct chipone *icn)
{ … }
static int chipone_common_probe(struct device *dev, struct chipone **icnr)
{ … }
static int chipone_dsi_probe(struct mipi_dsi_device *dsi)
{ … }
static int chipone_i2c_probe(struct i2c_client *client)
{ … }
static void chipone_dsi_remove(struct mipi_dsi_device *dsi)
{ … }
static const struct of_device_id chipone_of_match[] = …;
MODULE_DEVICE_TABLE(of, chipone_of_match);
static struct mipi_dsi_driver chipone_dsi_driver = …;
static struct i2c_device_id chipone_i2c_id[] = …;
MODULE_DEVICE_TABLE(i2c, chipone_i2c_id);
static struct i2c_driver chipone_i2c_driver = …;
static int __init chipone_init(void)
{ … }
module_init(…) …;
static void __exit chipone_exit(void)
{ … }
module_exit(chipone_exit);
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;