/* SPDX-License-Identifier: GPL-2.0-only */ /* * Defines for Mobile High-Definition Link (MHL) interface * * Copyright (C) 2015, Samsung Electronics, Co., Ltd. * Andrzej Hajda <[email protected]> * * Based on MHL driver for Android devices. * Copyright (C) 2013-2014 Silicon Image, Inc. */ #ifndef __MHL_H__ #define __MHL_H__ #include <linux/types.h> /* Device Capabilities Registers */ enum { … }; #define MHL_DCAP_CAT_SINK … #define MHL_DCAP_CAT_SOURCE … #define MHL_DCAP_CAT_POWER … #define MHL_DCAP_CAT_PLIM(x) … #define MHL_DCAP_VID_LINK_RGB444 … #define MHL_DCAP_VID_LINK_YCBCR444 … #define MHL_DCAP_VID_LINK_YCBCR422 … #define MHL_DCAP_VID_LINK_PPIXEL … #define MHL_DCAP_VID_LINK_ISLANDS … #define MHL_DCAP_VID_LINK_VGA … #define MHL_DCAP_VID_LINK_16BPP … #define MHL_DCAP_AUD_LINK_2CH … #define MHL_DCAP_AUD_LINK_8CH … #define MHL_DCAP_VT_GRAPHICS … #define MHL_DCAP_VT_PHOTO … #define MHL_DCAP_VT_CINEMA … #define MHL_DCAP_VT_GAMES … #define MHL_DCAP_SUPP_VT … #define MHL_DCAP_LD_DISPLAY … #define MHL_DCAP_LD_VIDEO … #define MHL_DCAP_LD_AUDIO … #define MHL_DCAP_LD_MEDIA … #define MHL_DCAP_LD_TUNER … #define MHL_DCAP_LD_RECORD … #define MHL_DCAP_LD_SPEAKER … #define MHL_DCAP_LD_GUI … #define MHL_DCAP_LD_ALL … #define MHL_DCAP_FEATURE_RCP_SUPPORT … #define MHL_DCAP_FEATURE_RAP_SUPPORT … #define MHL_DCAP_FEATURE_SP_SUPPORT … #define MHL_DCAP_FEATURE_UCP_SEND_SUPPOR … #define MHL_DCAP_FEATURE_UCP_RECV_SUPPORT … #define MHL_DCAP_FEATURE_RBP_SUPPORT … /* Extended Device Capabilities Registers */ enum { … }; #define MHL_XDC_ECBUS_S_075 … #define MHL_XDC_ECBUS_S_8BIT … #define MHL_XDC_ECBUS_S_12BIT … #define MHL_XDC_ECBUS_D_150 … #define MHL_XDC_ECBUS_D_8BIT … #define MHL_XDC_TMDS_000 … #define MHL_XDC_TMDS_150 … #define MHL_XDC_TMDS_300 … #define MHL_XDC_TMDS_600 … /* MHL_XDC_ECBUS_ROLES flags */ #define MHL_XDC_DEV_HOST … #define MHL_XDC_DEV_DEVICE … #define MHL_XDC_DEV_CHARGER … #define MHL_XDC_HID_HOST … #define MHL_XDC_HID_DEVICE … /* MHL_XDC_LOG_DEV_MAPX flags */ #define MHL_XDC_LD_PHONE … /* Device Status Registers */ enum { … }; /* Offset of DEVSTAT registers */ #define MHL_DST_OFFSET … #define MHL_DST_REG(name) … #define MHL_DST_CONN_DCAP_RDY … #define MHL_DST_CONN_XDEVCAPP_SUPP … #define MHL_DST_CONN_POW_STAT … #define MHL_DST_CONN_PLIM_STAT_MASK … #define MHL_DST_LM_CLK_MODE_MASK … #define MHL_DST_LM_CLK_MODE_PACKED_PIXEL … #define MHL_DST_LM_CLK_MODE_NORMAL … #define MHL_DST_LM_PATH_EN_MASK … #define MHL_DST_LM_PATH_ENABLED … #define MHL_DST_LM_PATH_DISABLED … #define MHL_DST_LM_MUTED_MASK … /* Extended Device Status Registers */ enum { … }; /* Offset of XDEVSTAT registers */ #define MHL_XDS_OFFSET … #define MHL_XDS_REG(name) … /* MHL_XDS_REG_CURR_ECBUS_MODE flags */ #define MHL_XDS_SLOT_MODE_8BIT … #define MHL_XDS_SLOT_MODE_6BIT … #define MHL_XDS_ECBUS_S … #define MHL_XDS_ECBUS_D … #define MHL_XDS_LINK_CLOCK_75MHZ … #define MHL_XDS_LINK_CLOCK_150MHZ … #define MHL_XDS_LINK_CLOCK_300MHZ … #define MHL_XDS_LINK_CLOCK_600MHZ … #define MHL_XDS_LINK_STATUS_NO_SIGNAL … #define MHL_XDS_LINK_STATUS_CRU_LOCKED … #define MHL_XDS_LINK_STATUS_TMDS_NORMAL … #define MHL_XDS_LINK_STATUS_TMDS_RESERVED … #define MHL_XDS_LINK_RATE_1_5_GBPS … #define MHL_XDS_LINK_RATE_3_0_GBPS … #define MHL_XDS_LINK_RATE_6_0_GBPS … #define MHL_XDS_ATT_CAPABLE … #define MHL_XDS_SINK_STATUS_1_HPD_LOW … #define MHL_XDS_SINK_STATUS_1_HPD_HIGH … #define MHL_XDS_SINK_STATUS_2_HPD_LOW … #define MHL_XDS_SINK_STATUS_2_HPD_HIGH … #define MHL_XDS_SINK_STATUS_3_HPD_LOW … #define MHL_XDS_SINK_STATUS_3_HPD_HIGH … #define MHL_XDS_SINK_STATUS_4_HPD_LOW … #define MHL_XDS_SINK_STATUS_4_HPD_HIGH … /* Interrupt Registers */ enum { … }; /* Offset of DEVSTAT registers */ #define MHL_INT_OFFSET … #define MHL_INT_REG(name) … #define MHL_INT_RC_DCAP_CHG … #define MHL_INT_RC_DSCR_CHG … #define MHL_INT_RC_REQ_WRT … #define MHL_INT_RC_GRT_WRT … #define MHL_INT_RC_3D_REQ … #define MHL_INT_RC_FEAT_REQ … #define MHL_INT_RC_FEAT_COMPLETE … #define MHL_INT_DC_EDID_CHG … enum { … }; /* MSC message types */ enum { … }; /* RAP action codes */ #define MHL_RAP_POLL … #define MHL_RAP_CONTENT_ON … #define MHL_RAP_CONTENT_OFF … #define MHL_RAP_CBUS_MODE_DOWN … #define MHL_RAP_CBUS_MODE_UP … /* RAPK status codes */ #define MHL_RAPK_NO_ERR … #define MHL_RAPK_UNRECOGNIZED … #define MHL_RAPK_UNSUPPORTED … #define MHL_RAPK_BUSY … /* Bit masks for RCP messages */ #define MHL_RCP_KEY_RELEASED_MASK … #define MHL_RCP_KEY_ID_MASK … /* * Error status codes for RCPE messages */ /* No error. (Not allowed in RCPE messages) */ #define MHL_RCPE_STATUS_NO_ERROR … /* Unsupported/unrecognized key code */ #define MHL_RCPE_STATUS_INEFFECTIVE_KEY_CODE … /* Responder busy. Initiator may retry message */ #define MHL_RCPE_STATUS_BUSY … /* * Error status codes for RBPE messages */ /* No error. (Not allowed in RBPE messages) */ #define MHL_RBPE_STATUS_NO_ERROR … /* Unsupported/unrecognized button code */ #define MHL_RBPE_STATUS_INEFFECTIVE_BUTTON_CODE … /* Responder busy. Initiator may retry message */ #define MHL_RBPE_STATUS_BUSY … /* * Error status codes for UCPE messages */ /* No error. (Not allowed in UCPE messages) */ #define MHL_UCPE_STATUS_NO_ERROR … /* Unsupported/unrecognized key code */ #define MHL_UCPE_STATUS_INEFFECTIVE_KEY_CODE … enum mhl_burst_id { … }; struct mhl_burst_blk_rcv_buffer_info { … } __packed; struct mhl3_burst_header { … } __packed; struct mhl_burst_bits_per_pixel_fmt { … } __packed; struct mhl_burst_emsc_support { … } __packed; struct mhl_burst_audio_descr { … } __packed; /* * MHL3 infoframe related definitions */ #define MHL3_IEEE_OUI … #define MHL3_INFOFRAME_SIZE … enum mhl3_video_format { … }; enum mhl3_3d_format_type { … }; struct mhl3_infoframe { … }; #endif /* __MHL_H__ */
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