// SPDX-License-Identifier: GPL-2.0 /* * TI SN65DSI83,84,85 driver * * Currently supported: * - SN65DSI83 * = 1x Single-link DSI ~ 1x Single-link LVDS * - Supported * - Single-link LVDS mode tested * - SN65DSI84 * = 1x Single-link DSI ~ 2x Single-link or 1x Dual-link LVDS * - Supported * - Dual-link LVDS mode tested * - 2x Single-link LVDS mode unsupported * (should be easy to add by someone who has the HW) * - SN65DSI85 * = 2x Single-link or 1x Dual-link DSI ~ 2x Single-link or 1x Dual-link LVDS * - Unsupported * (should be easy to add by someone who has the HW) * * Copyright (C) 2021 Marek Vasut <[email protected]> * * Based on previous work of: * Valentin Raevsky <[email protected]> * Philippe Schenker <[email protected]> */ #include <linux/bits.h> #include <linux/clk.h> #include <linux/gpio/consumer.h> #include <linux/i2c.h> #include <linux/media-bus-format.h> #include <linux/module.h> #include <linux/of.h> #include <linux/of_graph.h> #include <linux/regmap.h> #include <linux/regulator/consumer.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_bridge.h> #include <drm/drm_mipi_dsi.h> #include <drm/drm_of.h> #include <drm/drm_panel.h> #include <drm/drm_print.h> #include <drm/drm_probe_helper.h> /* ID registers */ #define REG_ID(n) … /* Reset and clock registers */ #define REG_RC_RESET … #define REG_RC_RESET_SOFT_RESET … #define REG_RC_LVDS_PLL … #define REG_RC_LVDS_PLL_PLL_EN_STAT … #define REG_RC_LVDS_PLL_LVDS_CLK_RANGE(n) … #define REG_RC_LVDS_PLL_HS_CLK_SRC_DPHY … #define REG_RC_DSI_CLK … #define REG_RC_DSI_CLK_DSI_CLK_DIVIDER(n) … #define REG_RC_DSI_CLK_REFCLK_MULTIPLIER(n) … #define REG_RC_PLL_EN … #define REG_RC_PLL_EN_PLL_EN … /* DSI registers */ #define REG_DSI_LANE … #define REG_DSI_LANE_LEFT_RIGHT_PIXELS … #define REG_DSI_LANE_DSI_CHANNEL_MODE_DUAL … #define REG_DSI_LANE_DSI_CHANNEL_MODE_2SINGLE … #define REG_DSI_LANE_DSI_CHANNEL_MODE_SINGLE … #define REG_DSI_LANE_CHA_DSI_LANES(n) … #define REG_DSI_LANE_CHB_DSI_LANES(n) … #define REG_DSI_LANE_SOT_ERR_TOL_DIS … #define REG_DSI_EQ … #define REG_DSI_EQ_CHA_DSI_DATA_EQ(n) … #define REG_DSI_EQ_CHA_DSI_CLK_EQ(n) … #define REG_DSI_CLK … #define REG_DSI_CLK_CHA_DSI_CLK_RANGE(n) … /* LVDS registers */ #define REG_LVDS_FMT … #define REG_LVDS_FMT_DE_NEG_POLARITY … #define REG_LVDS_FMT_HS_NEG_POLARITY … #define REG_LVDS_FMT_VS_NEG_POLARITY … #define REG_LVDS_FMT_LVDS_LINK_CFG … #define REG_LVDS_FMT_CHA_24BPP_MODE … #define REG_LVDS_FMT_CHB_24BPP_MODE … #define REG_LVDS_FMT_CHA_24BPP_FORMAT1 … #define REG_LVDS_FMT_CHB_24BPP_FORMAT1 … #define REG_LVDS_VCOM … #define REG_LVDS_VCOM_CHA_LVDS_VOCM … #define REG_LVDS_VCOM_CHB_LVDS_VOCM … #define REG_LVDS_VCOM_CHA_LVDS_VOD_SWING(n) … #define REG_LVDS_VCOM_CHB_LVDS_VOD_SWING(n) … #define REG_LVDS_LANE … #define REG_LVDS_LANE_EVEN_ODD_SWAP … #define REG_LVDS_LANE_CHA_REVERSE_LVDS … #define REG_LVDS_LANE_CHB_REVERSE_LVDS … #define REG_LVDS_LANE_CHA_LVDS_TERM … #define REG_LVDS_LANE_CHB_LVDS_TERM … #define REG_LVDS_CM … #define REG_LVDS_CM_CHA_LVDS_CM_ADJUST(n) … #define REG_LVDS_CM_CHB_LVDS_CM_ADJUST(n) … /* Video registers */ #define REG_VID_CHA_ACTIVE_LINE_LENGTH_LOW … #define REG_VID_CHA_ACTIVE_LINE_LENGTH_HIGH … #define REG_VID_CHA_VERTICAL_DISPLAY_SIZE_LOW … #define REG_VID_CHA_VERTICAL_DISPLAY_SIZE_HIGH … #define REG_VID_CHA_SYNC_DELAY_LOW … #define REG_VID_CHA_SYNC_DELAY_HIGH … #define REG_VID_CHA_HSYNC_PULSE_WIDTH_LOW … #define REG_VID_CHA_HSYNC_PULSE_WIDTH_HIGH … #define REG_VID_CHA_VSYNC_PULSE_WIDTH_LOW … #define REG_VID_CHA_VSYNC_PULSE_WIDTH_HIGH … #define REG_VID_CHA_HORIZONTAL_BACK_PORCH … #define REG_VID_CHA_VERTICAL_BACK_PORCH … #define REG_VID_CHA_HORIZONTAL_FRONT_PORCH … #define REG_VID_CHA_VERTICAL_FRONT_PORCH … #define REG_VID_CHA_TEST_PATTERN … /* IRQ registers */ #define REG_IRQ_GLOBAL … #define REG_IRQ_GLOBAL_IRQ_EN … #define REG_IRQ_EN … #define REG_IRQ_EN_CHA_SYNCH_ERR_EN … #define REG_IRQ_EN_CHA_CRC_ERR_EN … #define REG_IRQ_EN_CHA_UNC_ECC_ERR_EN … #define REG_IRQ_EN_CHA_COR_ECC_ERR_EN … #define REG_IRQ_EN_CHA_LLP_ERR_EN … #define REG_IRQ_EN_CHA_SOT_BIT_ERR_EN … #define REG_IRQ_EN_CHA_PLL_UNLOCK_EN … #define REG_IRQ_STAT … #define REG_IRQ_STAT_CHA_SYNCH_ERR … #define REG_IRQ_STAT_CHA_CRC_ERR … #define REG_IRQ_STAT_CHA_UNC_ECC_ERR … #define REG_IRQ_STAT_CHA_COR_ECC_ERR … #define REG_IRQ_STAT_CHA_LLP_ERR … #define REG_IRQ_STAT_CHA_SOT_BIT_ERR … #define REG_IRQ_STAT_CHA_PLL_UNLOCK … enum sn65dsi83_model { … }; struct sn65dsi83 { … }; static const struct regmap_range sn65dsi83_readable_ranges[] = …; static const struct regmap_access_table sn65dsi83_readable_table = …; static const struct regmap_range sn65dsi83_writeable_ranges[] = …; static const struct regmap_access_table sn65dsi83_writeable_table = …; static const struct regmap_range sn65dsi83_volatile_ranges[] = …; static const struct regmap_access_table sn65dsi83_volatile_table = …; static const struct regmap_config sn65dsi83_regmap_config = …; static struct sn65dsi83 *bridge_to_sn65dsi83(struct drm_bridge *bridge) { … } static int sn65dsi83_attach(struct drm_bridge *bridge, enum drm_bridge_attach_flags flags) { … } static void sn65dsi83_detach(struct drm_bridge *bridge) { … } static u8 sn65dsi83_get_lvds_range(struct sn65dsi83 *ctx, const struct drm_display_mode *mode) { … } static u8 sn65dsi83_get_dsi_range(struct sn65dsi83 *ctx, const struct drm_display_mode *mode) { … } static u8 sn65dsi83_get_dsi_div(struct sn65dsi83 *ctx) { … } static void sn65dsi83_atomic_pre_enable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { … } static void sn65dsi83_atomic_enable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { … } static void sn65dsi83_atomic_disable(struct drm_bridge *bridge, struct drm_bridge_state *old_bridge_state) { … } static enum drm_mode_status sn65dsi83_mode_valid(struct drm_bridge *bridge, const struct drm_display_info *info, const struct drm_display_mode *mode) { … } #define MAX_INPUT_SEL_FORMATS … static u32 * sn65dsi83_atomic_get_input_bus_fmts(struct drm_bridge *bridge, struct drm_bridge_state *bridge_state, struct drm_crtc_state *crtc_state, struct drm_connector_state *conn_state, u32 output_fmt, unsigned int *num_input_fmts) { … } static const struct drm_bridge_funcs sn65dsi83_funcs = …; static int sn65dsi83_parse_dt(struct sn65dsi83 *ctx, enum sn65dsi83_model model) { … } static int sn65dsi83_host_attach(struct sn65dsi83 *ctx) { … } static int sn65dsi83_probe(struct i2c_client *client) { … } static void sn65dsi83_remove(struct i2c_client *client) { … } static struct i2c_device_id sn65dsi83_id[] = …; MODULE_DEVICE_TABLE(i2c, sn65dsi83_id); static const struct of_device_id sn65dsi83_match_table[] = …; MODULE_DEVICE_TABLE(of, sn65dsi83_match_table); static struct i2c_driver sn65dsi83_driver = …; module_i2c_driver(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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