/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2015 Etnaviv Project * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License version 2 as published by * the Free Software Foundation. * * This program is distributed in the hope that it will be useful, but WITHOUT * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for * more details. * * You should have received a copy of the GNU General Public License along with * this program. If not, see <http://www.gnu.org/licenses/>. */ #ifndef __ETNAVIV_DRM_H__ #define __ETNAVIV_DRM_H__ #include "drm.h" #if defined(__cplusplus) extern "C" { #endif /* Please note that modifications to all structs defined here are * subject to backwards-compatibility constraints: * 1) Do not use pointers, use __u64 instead for 32 bit / 64 bit * user/kernel compatibility * 2) Keep fields aligned to their size * 3) Because of how drm_ioctl() works, we can add new fields at * the end of an ioctl if some care is taken: drm_ioctl() will * zero out the new fields at the tail of the ioctl, so a zero * value should have a backwards compatible meaning. And for * output params, userspace won't see the newly added output * fields.. so that has to be somehow ok. */ /* timeouts are specified in clock-monotonic absolute times (to simplify * restarting interrupted ioctls). The following struct is logically the * same as 'struct timespec' but 32/64b ABI safe. */ struct drm_etnaviv_timespec { … }; #define ETNAVIV_PARAM_GPU_MODEL … #define ETNAVIV_PARAM_GPU_REVISION … #define ETNAVIV_PARAM_GPU_FEATURES_0 … #define ETNAVIV_PARAM_GPU_FEATURES_1 … #define ETNAVIV_PARAM_GPU_FEATURES_2 … #define ETNAVIV_PARAM_GPU_FEATURES_3 … #define ETNAVIV_PARAM_GPU_FEATURES_4 … #define ETNAVIV_PARAM_GPU_FEATURES_5 … #define ETNAVIV_PARAM_GPU_FEATURES_6 … #define ETNAVIV_PARAM_GPU_FEATURES_7 … #define ETNAVIV_PARAM_GPU_FEATURES_8 … #define ETNAVIV_PARAM_GPU_FEATURES_9 … #define ETNAVIV_PARAM_GPU_FEATURES_10 … #define ETNAVIV_PARAM_GPU_FEATURES_11 … #define ETNAVIV_PARAM_GPU_FEATURES_12 … #define ETNAVIV_PARAM_GPU_STREAM_COUNT … #define ETNAVIV_PARAM_GPU_REGISTER_MAX … #define ETNAVIV_PARAM_GPU_THREAD_COUNT … #define ETNAVIV_PARAM_GPU_VERTEX_CACHE_SIZE … #define ETNAVIV_PARAM_GPU_SHADER_CORE_COUNT … #define ETNAVIV_PARAM_GPU_PIXEL_PIPES … #define ETNAVIV_PARAM_GPU_VERTEX_OUTPUT_BUFFER_SIZE … #define ETNAVIV_PARAM_GPU_BUFFER_SIZE … #define ETNAVIV_PARAM_GPU_INSTRUCTION_COUNT … #define ETNAVIV_PARAM_GPU_NUM_CONSTANTS … #define ETNAVIV_PARAM_GPU_NUM_VARYINGS … #define ETNAVIV_PARAM_SOFTPIN_START_ADDR … #define ETNAVIV_PARAM_GPU_PRODUCT_ID … #define ETNAVIV_PARAM_GPU_CUSTOMER_ID … #define ETNAVIV_PARAM_GPU_ECO_ID … #define ETNA_MAX_PIPES … struct drm_etnaviv_param { … }; /* * GEM buffers: */ #define ETNA_BO_CACHE_MASK … /* cache modes */ #define ETNA_BO_CACHED … #define ETNA_BO_WC … #define ETNA_BO_UNCACHED … /* map flags */ #define ETNA_BO_FORCE_MMU … struct drm_etnaviv_gem_new { … }; struct drm_etnaviv_gem_info { … }; #define ETNA_PREP_READ … #define ETNA_PREP_WRITE … #define ETNA_PREP_NOSYNC … struct drm_etnaviv_gem_cpu_prep { … }; struct drm_etnaviv_gem_cpu_fini { … }; /* * Cmdstream Submission: */ /* The value written into the cmdstream is logically: * relocbuf->gpuaddr + reloc_offset * * NOTE that reloc's must be sorted by order of increasing submit_offset, * otherwise EINVAL. */ struct drm_etnaviv_gem_submit_reloc { … }; /* Each buffer referenced elsewhere in the cmdstream submit (ie. the * cmdstream buffer(s) themselves or reloc entries) has one (and only * one) entry in the submit->bos[] table. * * As a optimization, the current buffer (gpu virtual address) can be * passed back through the 'presumed' field. If on a subsequent reloc, * userspace passes back a 'presumed' address that is still valid, * then patching the cmdstream for this entry is skipped. This can * avoid kernel needing to map/access the cmdstream bo in the common * case. * If the submit is a softpin submit (ETNA_SUBMIT_SOFTPIN) the 'presumed' * field is interpreted as the fixed location to map the bo into the gpu * virtual address space. If the kernel is unable to map the buffer at * this location the submit will fail. This means userspace is responsible * for the whole gpu virtual address management. */ #define ETNA_SUBMIT_BO_READ … #define ETNA_SUBMIT_BO_WRITE … struct drm_etnaviv_gem_submit_bo { … }; /* performance monitor request (pmr) */ #define ETNA_PM_PROCESS_PRE … #define ETNA_PM_PROCESS_POST … struct drm_etnaviv_gem_submit_pmr { … }; /* Each cmdstream submit consists of a table of buffers involved, and * one or more cmdstream buffers. This allows for conditional execution * (context-restore), and IB buffers needed for per tile/bin draw cmds. */ #define ETNA_SUBMIT_NO_IMPLICIT … #define ETNA_SUBMIT_FENCE_FD_IN … #define ETNA_SUBMIT_FENCE_FD_OUT … #define ETNA_SUBMIT_SOFTPIN … #define ETNA_SUBMIT_FLAGS … #define ETNA_PIPE_3D … #define ETNA_PIPE_2D … #define ETNA_PIPE_VG … struct drm_etnaviv_gem_submit { … }; /* The normal way to synchronize with the GPU is just to CPU_PREP on * a buffer if you need to access it from the CPU (other cmdstream * submission from same or other contexts, PAGE_FLIP ioctl, etc, all * handle the required synchronization under the hood). This ioctl * mainly just exists as a way to implement the gallium pipe_fence * APIs without requiring a dummy bo to synchronize on. */ #define ETNA_WAIT_NONBLOCK … struct drm_etnaviv_wait_fence { … }; #define ETNA_USERPTR_READ … #define ETNA_USERPTR_WRITE … struct drm_etnaviv_gem_userptr { … }; struct drm_etnaviv_gem_wait { … }; /* * Performance Monitor (PM): */ struct drm_etnaviv_pm_domain { … }; struct drm_etnaviv_pm_signal { … }; #define DRM_ETNAVIV_GET_PARAM … /* placeholder: #define DRM_ETNAVIV_SET_PARAM 0x01 */ #define DRM_ETNAVIV_GEM_NEW … #define DRM_ETNAVIV_GEM_INFO … #define DRM_ETNAVIV_GEM_CPU_PREP … #define DRM_ETNAVIV_GEM_CPU_FINI … #define DRM_ETNAVIV_GEM_SUBMIT … #define DRM_ETNAVIV_WAIT_FENCE … #define DRM_ETNAVIV_GEM_USERPTR … #define DRM_ETNAVIV_GEM_WAIT … #define DRM_ETNAVIV_PM_QUERY_DOM … #define DRM_ETNAVIV_PM_QUERY_SIG … #define DRM_ETNAVIV_NUM_IOCTLS … #define DRM_IOCTL_ETNAVIV_GET_PARAM … #define DRM_IOCTL_ETNAVIV_GEM_NEW … #define DRM_IOCTL_ETNAVIV_GEM_INFO … #define DRM_IOCTL_ETNAVIV_GEM_CPU_PREP … #define DRM_IOCTL_ETNAVIV_GEM_CPU_FINI … #define DRM_IOCTL_ETNAVIV_GEM_SUBMIT … #define DRM_IOCTL_ETNAVIV_WAIT_FENCE … #define DRM_IOCTL_ETNAVIV_GEM_USERPTR … #define DRM_IOCTL_ETNAVIV_GEM_WAIT … #define DRM_IOCTL_ETNAVIV_PM_QUERY_DOM … #define DRM_IOCTL_ETNAVIV_PM_QUERY_SIG … #if defined(__cplusplus) } #endif #endif /* __ETNAVIV_DRM_H__ */
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