linux/drivers/gpu/drm/bridge/ite-it66121.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2020 BayLibre, SAS
 * Author: Phong LE <[email protected]>
 * Copyright (C) 2018-2019, Artem Mygaiev
 * Copyright (C) 2017, Fresco Logic, Incorporated.
 *
 */

#include <linux/media-bus-format.h>
#include <linux/module.h>
#include <linux/device.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/bitfield.h>
#include <linux/property.h>
#include <linux/regmap.h>
#include <linux/of_graph.h>
#include <linux/gpio/consumer.h>
#include <linux/pinctrl/consumer.h>
#include <linux/regulator/consumer.h>

#include <drm/drm_atomic_helper.h>
#include <drm/drm_bridge.h>
#include <drm/drm_edid.h>
#include <drm/drm_modes.h>
#include <drm/drm_print.h>
#include <drm/drm_probe_helper.h>

#include <sound/hdmi-codec.h>

#define IT66121_VENDOR_ID0_REG
#define IT66121_VENDOR_ID1_REG
#define IT66121_DEVICE_ID0_REG
#define IT66121_DEVICE_ID1_REG

#define IT66121_REVISION_MASK
#define IT66121_DEVICE_ID1_MASK

#define IT66121_MASTER_SEL_REG
#define IT66121_MASTER_SEL_HOST

#define IT66121_AFE_DRV_REG
#define IT66121_AFE_DRV_RST
#define IT66121_AFE_DRV_PWD

#define IT66121_INPUT_MODE_REG
#define IT66121_INPUT_MODE_RGB
#define IT66121_INPUT_MODE_YUV422
#define IT66121_INPUT_MODE_YUV444
#define IT66121_INPUT_MODE_CCIR656
#define IT66121_INPUT_MODE_SYNCEMB
#define IT66121_INPUT_MODE_DDR

#define IT66121_INPUT_CSC_REG
#define IT66121_INPUT_CSC_ENDITHER
#define IT66121_INPUT_CSC_ENUDFILTER
#define IT66121_INPUT_CSC_DNFREE_GO
#define IT66121_INPUT_CSC_RGB_TO_YUV
#define IT66121_INPUT_CSC_YUV_TO_RGB
#define IT66121_INPUT_CSC_NO_CONV

#define IT66121_AFE_XP_REG
#define IT66121_AFE_XP_GAINBIT
#define IT66121_AFE_XP_PWDPLL
#define IT66121_AFE_XP_ENI
#define IT66121_AFE_XP_ENO
#define IT66121_AFE_XP_RESETB
#define IT66121_AFE_XP_PWDI
#define IT6610_AFE_XP_BYPASS

#define IT66121_AFE_IP_REG
#define IT66121_AFE_IP_GAINBIT
#define IT66121_AFE_IP_PWDPLL
#define IT66121_AFE_IP_CKSEL_05
#define IT66121_AFE_IP_CKSEL_1
#define IT66121_AFE_IP_CKSEL_2
#define IT66121_AFE_IP_CKSEL_2OR4
#define IT66121_AFE_IP_ER0
#define IT66121_AFE_IP_RESETB
#define IT66121_AFE_IP_ENC
#define IT66121_AFE_IP_EC1

#define IT66121_AFE_XP_EC1_REG
#define IT66121_AFE_XP_EC1_LOWCLK

#define IT66121_SW_RST_REG
#define IT66121_SW_RST_REF
#define IT66121_SW_RST_AREF
#define IT66121_SW_RST_VID
#define IT66121_SW_RST_AUD
#define IT66121_SW_RST_HDCP

#define IT66121_DDC_COMMAND_REG
#define IT66121_DDC_COMMAND_BURST_READ
#define IT66121_DDC_COMMAND_EDID_READ
#define IT66121_DDC_COMMAND_FIFO_CLR
#define IT66121_DDC_COMMAND_SCL_PULSE
#define IT66121_DDC_COMMAND_ABORT

#define IT66121_HDCP_REG
#define IT66121_HDCP_CPDESIRED
#define IT66121_HDCP_EN1P1FEAT

#define IT66121_INT_STATUS1_REG
#define IT66121_INT_STATUS1_AUD_OVF
#define IT66121_INT_STATUS1_DDC_NOACK
#define IT66121_INT_STATUS1_DDC_FIFOERR
#define IT66121_INT_STATUS1_DDC_BUSHANG
#define IT66121_INT_STATUS1_RX_SENS_STATUS
#define IT66121_INT_STATUS1_HPD_STATUS

#define IT66121_DDC_HEADER_REG
#define IT66121_DDC_HEADER_HDCP
#define IT66121_DDC_HEADER_EDID

#define IT66121_DDC_OFFSET_REG
#define IT66121_DDC_BYTE_REG
#define IT66121_DDC_SEGMENT_REG
#define IT66121_DDC_RD_FIFO_REG

#define IT66121_CLK_BANK_REG
#define IT66121_CLK_BANK_PWROFF_RCLK
#define IT66121_CLK_BANK_PWROFF_ACLK
#define IT66121_CLK_BANK_PWROFF_TXCLK
#define IT66121_CLK_BANK_PWROFF_CRCLK
#define IT66121_CLK_BANK_0
#define IT66121_CLK_BANK_1

#define IT66121_INT_REG
#define IT66121_INT_ACTIVE_HIGH
#define IT66121_INT_OPEN_DRAIN
#define IT66121_INT_TX_CLK_OFF

#define IT66121_INT_MASK1_REG
#define IT66121_INT_MASK1_AUD_OVF
#define IT66121_INT_MASK1_DDC_NOACK
#define IT66121_INT_MASK1_DDC_FIFOERR
#define IT66121_INT_MASK1_DDC_BUSHANG
#define IT66121_INT_MASK1_RX_SENS
#define IT66121_INT_MASK1_HPD

#define IT66121_INT_CLR1_REG
#define IT66121_INT_CLR1_PKTACP
#define IT66121_INT_CLR1_PKTNULL
#define IT66121_INT_CLR1_PKTGEN
#define IT66121_INT_CLR1_KSVLISTCHK
#define IT66121_INT_CLR1_AUTHDONE
#define IT66121_INT_CLR1_AUTHFAIL
#define IT66121_INT_CLR1_RX_SENS
#define IT66121_INT_CLR1_HPD

#define IT66121_AV_MUTE_REG
#define IT66121_AV_MUTE_ON
#define IT66121_AV_MUTE_BLUESCR

#define IT66121_PKT_CTS_CTRL_REG
#define IT66121_PKT_CTS_CTRL_SEL

#define IT66121_PKT_GEN_CTRL_REG
#define IT66121_PKT_GEN_CTRL_ON
#define IT66121_PKT_GEN_CTRL_RPT

#define IT66121_AVIINFO_DB1_REG
#define IT66121_AVIINFO_DB2_REG
#define IT66121_AVIINFO_DB3_REG
#define IT66121_AVIINFO_DB4_REG
#define IT66121_AVIINFO_DB5_REG
#define IT66121_AVIINFO_CSUM_REG
#define IT66121_AVIINFO_DB6_REG
#define IT66121_AVIINFO_DB7_REG
#define IT66121_AVIINFO_DB8_REG
#define IT66121_AVIINFO_DB9_REG
#define IT66121_AVIINFO_DB10_REG
#define IT66121_AVIINFO_DB11_REG
#define IT66121_AVIINFO_DB12_REG
#define IT66121_AVIINFO_DB13_REG

#define IT66121_AVI_INFO_PKT_REG
#define IT66121_AVI_INFO_PKT_ON
#define IT66121_AVI_INFO_PKT_RPT

#define IT66121_HDMI_MODE_REG
#define IT66121_HDMI_MODE_HDMI

#define IT66121_SYS_STATUS_REG
#define IT66121_SYS_STATUS_ACTIVE_IRQ
#define IT66121_SYS_STATUS_HPDETECT
#define IT66121_SYS_STATUS_SENDECTECT
#define IT66121_SYS_STATUS_VID_STABLE
#define IT66121_SYS_STATUS_AUD_CTS_CLR
#define IT66121_SYS_STATUS_CLEAR_IRQ

#define IT66121_DDC_STATUS_REG
#define IT66121_DDC_STATUS_TX_DONE
#define IT66121_DDC_STATUS_ACTIVE
#define IT66121_DDC_STATUS_NOACK
#define IT66121_DDC_STATUS_WAIT_BUS
#define IT66121_DDC_STATUS_ARBI_LOSE
#define IT66121_DDC_STATUS_FIFO_FULL
#define IT66121_DDC_STATUS_FIFO_EMPTY
#define IT66121_DDC_STATUS_FIFO_VALID

#define IT66121_EDID_SLEEP_US
#define IT66121_EDID_TIMEOUT_US
#define IT66121_EDID_FIFO_SIZE

#define IT66121_CLK_CTRL0_REG
#define IT66121_CLK_CTRL0_AUTO_OVER_SAMPLING
#define IT66121_CLK_CTRL0_EXT_MCLK_MASK
#define IT66121_CLK_CTRL0_EXT_MCLK_128FS
#define IT66121_CLK_CTRL0_EXT_MCLK_256FS
#define IT66121_CLK_CTRL0_EXT_MCLK_512FS
#define IT66121_CLK_CTRL0_EXT_MCLK_1024FS
#define IT66121_CLK_CTRL0_AUTO_IPCLK
#define IT66121_CLK_STATUS1_REG
#define IT66121_CLK_STATUS2_REG

#define IT66121_AUD_CTRL0_REG
#define IT66121_AUD_SWL
#define IT66121_AUD_16BIT
#define IT66121_AUD_18BIT
#define IT66121_AUD_20BIT
#define IT66121_AUD_24BIT
#define IT66121_AUD_SPDIFTC
#define IT66121_AUD_SPDIF
#define IT66121_AUD_I2S
#define IT66121_AUD_EN_I2S3
#define IT66121_AUD_EN_I2S2
#define IT66121_AUD_EN_I2S1
#define IT66121_AUD_EN_I2S0
#define IT66121_AUD_CTRL0_AUD_SEL

#define IT66121_AUD_CTRL1_REG
#define IT66121_AUD_FIFOMAP_REG
#define IT66121_AUD_CTRL3_REG
#define IT66121_AUD_SRCVALID_FLAT_REG
#define IT66121_AUD_FLAT_SRC0
#define IT66121_AUD_FLAT_SRC1
#define IT66121_AUD_FLAT_SRC2
#define IT66121_AUD_FLAT_SRC3
#define IT66121_AUD_HDAUDIO_REG

#define IT66121_AUD_PKT_CTS0_REG
#define IT66121_AUD_PKT_CTS1_REG
#define IT66121_AUD_PKT_CTS2_REG
#define IT66121_AUD_PKT_N0_REG
#define IT66121_AUD_PKT_N1_REG
#define IT66121_AUD_PKT_N2_REG

#define IT66121_AUD_CHST_MODE_REG
#define IT66121_AUD_CHST_CAT_REG
#define IT66121_AUD_CHST_SRCNUM_REG
#define IT66121_AUD_CHST_CHTNUM_REG
#define IT66121_AUD_CHST_CA_FS_REG
#define IT66121_AUD_CHST_OFS_WL_REG

#define IT66121_AUD_PKT_CTS_CNT0_REG
#define IT66121_AUD_PKT_CTS_CNT1_REG
#define IT66121_AUD_PKT_CTS_CNT2_REG

#define IT66121_AUD_FS_22P05K
#define IT66121_AUD_FS_44P1K
#define IT66121_AUD_FS_88P2K
#define IT66121_AUD_FS_176P4K
#define IT66121_AUD_FS_24K
#define IT66121_AUD_FS_48K
#define IT66121_AUD_FS_96K
#define IT66121_AUD_FS_192K
#define IT66121_AUD_FS_768K
#define IT66121_AUD_FS_32K
#define IT66121_AUD_FS_OTHER

#define IT66121_AUD_SWL_21BIT
#define IT66121_AUD_SWL_24BIT
#define IT66121_AUD_SWL_23BIT
#define IT66121_AUD_SWL_22BIT
#define IT66121_AUD_SWL_20BIT
#define IT66121_AUD_SWL_17BIT
#define IT66121_AUD_SWL_19BIT
#define IT66121_AUD_SWL_18BIT
#define IT66121_AUD_SWL_16BIT
#define IT66121_AUD_SWL_NOT_INDICATED

#define IT66121_AFE_CLK_HIGH

enum chip_id {};

struct it66121_chip_info {};

struct it66121_ctx {};

static const struct regmap_range_cfg it66121_regmap_banks[] =;

static const struct regmap_config it66121_regmap_config =;

static void it66121_hw_reset(struct it66121_ctx *ctx)
{}

static inline int it66121_preamble_ddc(struct it66121_ctx *ctx)
{}

static inline int it66121_fire_afe(struct it66121_ctx *ctx)
{}

/* TOFIX: Handle YCbCr Input & Output */
static int it66121_configure_input(struct it66121_ctx *ctx)
{}

/**
 * it66121_configure_afe() - Configure the analog front end
 * @ctx: it66121_ctx object
 * @mode: mode to configure
 *
 * RETURNS:
 * zero if success, a negative error code otherwise.
 */
static int it66121_configure_afe(struct it66121_ctx *ctx,
				 const struct drm_display_mode *mode)
{}

static inline int it66121_wait_ddc_ready(struct it66121_ctx *ctx)
{}

static int it66121_abort_ddc_ops(struct it66121_ctx *ctx)
{}

static int it66121_get_edid_block(void *context, u8 *buf,
				  unsigned int block, size_t len)
{}

static bool it66121_is_hpd_detect(struct it66121_ctx *ctx)
{}

static int it66121_bridge_attach(struct drm_bridge *bridge,
				 enum drm_bridge_attach_flags flags)
{}

static int it66121_set_mute(struct it66121_ctx *ctx, bool mute)
{}

#define MAX_OUTPUT_SEL_FORMATS

static u32 *it66121_bridge_atomic_get_output_bus_fmts(struct drm_bridge *bridge,
						      struct drm_bridge_state *bridge_state,
						      struct drm_crtc_state *crtc_state,
						      struct drm_connector_state *conn_state,
						      unsigned int *num_output_fmts)
{}

#define MAX_INPUT_SEL_FORMATS

static u32 *it66121_bridge_atomic_get_input_bus_fmts(struct drm_bridge *bridge,
						     struct drm_bridge_state *bridge_state,
						     struct drm_crtc_state *crtc_state,
						     struct drm_connector_state *conn_state,
						     u32 output_fmt,
						     unsigned int *num_input_fmts)
{}

static void it66121_bridge_enable(struct drm_bridge *bridge,
				  struct drm_bridge_state *bridge_state)
{}

static void it66121_bridge_disable(struct drm_bridge *bridge,
				   struct drm_bridge_state *bridge_state)
{}

static int it66121_bridge_check(struct drm_bridge *bridge,
				struct drm_bridge_state *bridge_state,
				struct drm_crtc_state *crtc_state,
				struct drm_connector_state *conn_state)
{}

static
void it66121_bridge_mode_set(struct drm_bridge *bridge,
			     const struct drm_display_mode *mode,
			     const struct drm_display_mode *adjusted_mode)
{}

static enum drm_mode_status it66121_bridge_mode_valid(struct drm_bridge *bridge,
						      const struct drm_display_info *info,
						      const struct drm_display_mode *mode)
{}

static enum drm_connector_status it66121_bridge_detect(struct drm_bridge *bridge)
{}

static void it66121_bridge_hpd_enable(struct drm_bridge *bridge)
{}

static void it66121_bridge_hpd_disable(struct drm_bridge *bridge)
{}

static const struct drm_edid *it66121_bridge_edid_read(struct drm_bridge *bridge,
						       struct drm_connector *connector)
{}

static const struct drm_bridge_funcs it66121_bridge_funcs =;

static irqreturn_t it66121_irq_threaded_handler(int irq, void *dev_id)
{}

static int it661221_set_chstat(struct it66121_ctx *ctx, u8 iec60958_chstat[])
{}

static int it661221_set_lpcm_audio(struct it66121_ctx *ctx, u8 audio_src_num, u8 audio_swl)
{}

static int it661221_set_ncts(struct it66121_ctx *ctx, u8 fs)
{}

static int it661221_audio_output_enable(struct it66121_ctx *ctx, bool enable)
{}

static int it661221_audio_ch_enable(struct it66121_ctx *ctx, bool enable)
{}

static int it66121_audio_hw_params(struct device *dev, void *data,
				   struct hdmi_codec_daifmt *daifmt,
				   struct hdmi_codec_params *params)
{}

static int it66121_audio_startup(struct device *dev, void *data)
{}

static void it66121_audio_shutdown(struct device *dev, void *data)
{}

static int it66121_audio_mute(struct device *dev, void *data,
			      bool enable, int direction)
{}

static int it66121_audio_get_eld(struct device *dev, void *data,
				 u8 *buf, size_t len)
{}

static const struct hdmi_codec_ops it66121_audio_codec_ops =;

static int it66121_audio_codec_init(struct it66121_ctx *ctx, struct device *dev)
{}

static const char * const it66121_supplies[] =;

static int it66121_probe(struct i2c_client *client)
{}

static void it66121_remove(struct i2c_client *client)
{}

static const struct it66121_chip_info it66121_chip_info =;

static const struct it66121_chip_info it6610_chip_info =;

static const struct of_device_id it66121_dt_match[] =;
MODULE_DEVICE_TABLE(of, it66121_dt_match);

static const struct i2c_device_id it66121_id[] =;
MODULE_DEVICE_TABLE(i2c, it66121_id);

static struct i2c_driver it66121_driver =;

module_i2c_driver();

MODULE_AUTHOR();
MODULE_DESCRIPTION();
MODULE_LICENSE();