// SPDX-License-Identifier: GPL-2.0-or-later /* * Copyright 2015 IBM Corp. * * Joel Stanley <[email protected]> */ #include <linux/clk.h> #include <linux/gpio/aspeed.h> #include <linux/gpio/driver.h> #include <linux/hashtable.h> #include <linux/init.h> #include <linux/io.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/pinctrl/consumer.h> #include <linux/platform_device.h> #include <linux/seq_file.h> #include <linux/spinlock.h> #include <linux/string.h> #include <asm/div64.h> /* * These two headers aren't meant to be used by GPIO drivers. We need * them in order to access gpio_chip_hwgpio() which we need to implement * the aspeed specific API which allows the coprocessor to request * access to some GPIOs and to arbitrate between coprocessor and ARM. */ #include <linux/gpio/consumer.h> #include "gpiolib.h" struct aspeed_bank_props { … }; struct aspeed_gpio_config { … }; /* * @offset_timer: Maps an offset to an @timer_users index, or zero if disabled * @timer_users: Tracks the number of users for each timer * * The @timer_users has four elements but the first element is unused. This is * to simplify accounting and indexing, as a zero value in @offset_timer * represents disabled debouncing for the GPIO. Any other value for an element * of @offset_timer is used as an index into @timer_users. This behaviour of * the zero value aligns with the behaviour of zero built from the timer * configuration registers (i.e. debouncing is disabled). */ struct aspeed_gpio { … }; struct aspeed_gpio_bank { … }; /* * Note: The "value" register returns the input value sampled on the * line even when the GPIO is configured as an output. Since * that input goes through synchronizers, writing, then reading * back may not return the written value right away. * * The "rdata" register returns the content of the write latch * and thus can be used to read back what was last written * reliably. */ static const int debounce_timers[4] = …; static const struct aspeed_gpio_copro_ops *copro_ops; static void *copro_data; static const struct aspeed_gpio_bank aspeed_gpio_banks[] = …; enum aspeed_gpio_reg { … }; #define GPIO_VAL_VALUE … #define GPIO_VAL_DIR … #define GPIO_IRQ_ENABLE … #define GPIO_IRQ_TYPE0 … #define GPIO_IRQ_TYPE1 … #define GPIO_IRQ_TYPE2 … #define GPIO_IRQ_STATUS … #define GPIO_DEBOUNCE_SEL1 … #define GPIO_DEBOUNCE_SEL2 … #define GPIO_CMDSRC_0 … #define GPIO_CMDSRC_1 … #define GPIO_CMDSRC_ARM … #define GPIO_CMDSRC_LPC … #define GPIO_CMDSRC_COLDFIRE … #define GPIO_CMDSRC_RESERVED … /* This will be resolved at compile time */ static inline void __iomem *bank_reg(struct aspeed_gpio *gpio, const struct aspeed_gpio_bank *bank, const enum aspeed_gpio_reg reg) { … } #define GPIO_BANK(x) … #define GPIO_OFFSET(x) … #define GPIO_BIT(x) … #define _GPIO_SET_DEBOUNCE(t, o, i) … #define GPIO_SET_DEBOUNCE1(t, o) … #define GPIO_SET_DEBOUNCE2(t, o) … static const struct aspeed_gpio_bank *to_bank(unsigned int offset) { … } static inline bool is_bank_props_sentinel(const struct aspeed_bank_props *props) { … } static inline const struct aspeed_bank_props *find_bank_props( struct aspeed_gpio *gpio, unsigned int offset) { … } static inline bool have_gpio(struct aspeed_gpio *gpio, unsigned int offset) { … } static inline bool have_input(struct aspeed_gpio *gpio, unsigned int offset) { … } #define have_irq(g, o) … #define have_debounce(g, o) … static inline bool have_output(struct aspeed_gpio *gpio, unsigned int offset) { … } static void aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio, const struct aspeed_gpio_bank *bank, int bindex, int cmdsrc) { … } static bool aspeed_gpio_copro_request(struct aspeed_gpio *gpio, unsigned int offset) { … } static void aspeed_gpio_copro_release(struct aspeed_gpio *gpio, unsigned int offset) { … } static int aspeed_gpio_get(struct gpio_chip *gc, unsigned int offset) { … } static void __aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) { … } static void aspeed_gpio_set(struct gpio_chip *gc, unsigned int offset, int val) { … } static int aspeed_gpio_dir_in(struct gpio_chip *gc, unsigned int offset) { … } static int aspeed_gpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val) { … } static int aspeed_gpio_get_direction(struct gpio_chip *gc, unsigned int offset) { … } static inline int irqd_to_aspeed_gpio_data(struct irq_data *d, struct aspeed_gpio **gpio, const struct aspeed_gpio_bank **bank, u32 *bit, int *offset) { … } static void aspeed_gpio_irq_ack(struct irq_data *d) { … } static void aspeed_gpio_irq_set_mask(struct irq_data *d, bool set) { … } static void aspeed_gpio_irq_mask(struct irq_data *d) { … } static void aspeed_gpio_irq_unmask(struct irq_data *d) { … } static int aspeed_gpio_set_type(struct irq_data *d, unsigned int type) { … } static void aspeed_gpio_irq_handler(struct irq_desc *desc) { … } static void aspeed_init_irq_valid_mask(struct gpio_chip *gc, unsigned long *valid_mask, unsigned int ngpios) { … } static int aspeed_gpio_reset_tolerance(struct gpio_chip *chip, unsigned int offset, bool enable) { … } static int aspeed_gpio_request(struct gpio_chip *chip, unsigned int offset) { … } static void aspeed_gpio_free(struct gpio_chip *chip, unsigned int offset) { … } static int usecs_to_cycles(struct aspeed_gpio *gpio, unsigned long usecs, u32 *cycles) { … } /* Call under gpio->lock */ static int register_allocated_timer(struct aspeed_gpio *gpio, unsigned int offset, unsigned int timer) { … } /* Call under gpio->lock */ static int unregister_allocated_timer(struct aspeed_gpio *gpio, unsigned int offset) { … } /* Call under gpio->lock */ static inline bool timer_allocation_registered(struct aspeed_gpio *gpio, unsigned int offset) { … } /* Call under gpio->lock */ static void configure_timer(struct aspeed_gpio *gpio, unsigned int offset, unsigned int timer) { … } static int enable_debounce(struct gpio_chip *chip, unsigned int offset, unsigned long usecs) { … } static int disable_debounce(struct gpio_chip *chip, unsigned int offset) { … } static int set_debounce(struct gpio_chip *chip, unsigned int offset, unsigned long usecs) { … } static int aspeed_gpio_set_config(struct gpio_chip *chip, unsigned int offset, unsigned long config) { … } /** * aspeed_gpio_copro_set_ops - Sets the callbacks used for handshaking with * the coprocessor for shared GPIO banks * @ops: The callbacks * @data: Pointer passed back to the callbacks */ int aspeed_gpio_copro_set_ops(const struct aspeed_gpio_copro_ops *ops, void *data) { … } EXPORT_SYMBOL_GPL(…); /** * aspeed_gpio_copro_grab_gpio - Mark a GPIO used by the coprocessor. The entire * bank gets marked and any access from the ARM will * result in handshaking via callbacks. * @desc: The GPIO to be marked * @vreg_offset: If non-NULL, returns the value register offset in the GPIO space * @dreg_offset: If non-NULL, returns the data latch register offset in the GPIO space * @bit: If non-NULL, returns the bit number of the GPIO in the registers */ int aspeed_gpio_copro_grab_gpio(struct gpio_desc *desc, u16 *vreg_offset, u16 *dreg_offset, u8 *bit) { … } EXPORT_SYMBOL_GPL(…); /** * aspeed_gpio_copro_release_gpio - Unmark a GPIO used by the coprocessor. * @desc: The GPIO to be marked */ int aspeed_gpio_copro_release_gpio(struct gpio_desc *desc) { … } EXPORT_SYMBOL_GPL(…); static void aspeed_gpio_irq_print_chip(struct irq_data *d, struct seq_file *p) { … } static const struct irq_chip aspeed_gpio_irq_chip = …; /* * Any banks not specified in a struct aspeed_bank_props array are assumed to * have the properties: * * { .input = 0xffffffff, .output = 0xffffffff } */ static const struct aspeed_bank_props ast2400_bank_props[] = …; static const struct aspeed_gpio_config ast2400_config = …/* 220 for simplicity, really 216 with two 4-GPIO holes, four at end */ { … }; static const struct aspeed_bank_props ast2500_bank_props[] = …; static const struct aspeed_gpio_config ast2500_config = …/* 232 for simplicity, actual number is 228 (4-GPIO hole in GPIOAB) */ { … }; static const struct aspeed_bank_props ast2600_bank_props[] = …; static const struct aspeed_gpio_config ast2600_config = …/* * ast2600 has two controllers one with 208 GPIOs and one with 36 GPIOs. * We expect ngpio being set in the device tree and this is a fallback * option. */ { … }; static const struct of_device_id aspeed_gpio_of_table[] = …; MODULE_DEVICE_TABLE(of, aspeed_gpio_of_table); static int __init aspeed_gpio_probe(struct platform_device *pdev) { … } static struct platform_driver aspeed_gpio_driver = …; module_platform_driver_probe(…); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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