linux/drivers/gpio/gpio-aspeed-sgpio.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Copyright 2019 American Megatrends International LLC.
 *
 * Author: Karthikeyan Mani <[email protected]>
 */

#include <linux/bitfield.h>
#include <linux/clk.h>
#include <linux/gpio/driver.h>
#include <linux/hashtable.h>
#include <linux/init.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/seq_file.h>
#include <linux/spinlock.h>
#include <linux/string.h>

#define ASPEED_SGPIO_CTRL …

#define ASPEED_SGPIO_CLK_DIV_MASK …
#define ASPEED_SGPIO_ENABLE …
#define ASPEED_SGPIO_PINS_SHIFT …

struct aspeed_sgpio_pdata { … };

struct aspeed_sgpio { … };

struct aspeed_sgpio_bank { … };

/*
 * Note: The "value" register returns the input value when the GPIO is
 *	 configured as an input.
 *
 *	 The "rdata" register returns the output value when the GPIO is
 *	 configured as an output.
 */
static const struct aspeed_sgpio_bank aspeed_sgpio_banks[] = …;

enum aspeed_sgpio_reg { … };

#define GPIO_VAL_VALUE …
#define GPIO_IRQ_ENABLE …
#define GPIO_IRQ_TYPE0 …
#define GPIO_IRQ_TYPE1 …
#define GPIO_IRQ_TYPE2 …
#define GPIO_IRQ_STATUS …

static void __iomem *bank_reg(struct aspeed_sgpio *gpio,
				     const struct aspeed_sgpio_bank *bank,
				     const enum aspeed_sgpio_reg reg)
{ … }

#define GPIO_BANK(x) …
#define GPIO_OFFSET(x) …
#define GPIO_BIT(x) …

static const struct aspeed_sgpio_bank *to_bank(unsigned int offset)
{ … }

static int aspeed_sgpio_init_valid_mask(struct gpio_chip *gc,
		unsigned long *valid_mask, unsigned int ngpios)
{ … }

static void aspeed_sgpio_irq_init_valid_mask(struct gpio_chip *gc,
		unsigned long *valid_mask, unsigned int ngpios)
{ … }

static bool aspeed_sgpio_is_input(unsigned int offset)
{ … }

static int aspeed_sgpio_get(struct gpio_chip *gc, unsigned int offset)
{ … }

static int sgpio_set_value(struct gpio_chip *gc, unsigned int offset, int val)
{ … }

static void aspeed_sgpio_set(struct gpio_chip *gc, unsigned int offset, int val)
{ … }

static int aspeed_sgpio_dir_in(struct gpio_chip *gc, unsigned int offset)
{ … }

static int aspeed_sgpio_dir_out(struct gpio_chip *gc, unsigned int offset, int val)
{ … }

static int aspeed_sgpio_get_direction(struct gpio_chip *gc, unsigned int offset)
{ … }

static void irqd_to_aspeed_sgpio_data(struct irq_data *d,
					struct aspeed_sgpio **gpio,
					const struct aspeed_sgpio_bank **bank,
					u32 *bit, int *offset)
{ … }

static void aspeed_sgpio_irq_ack(struct irq_data *d)
{ … }

static void aspeed_sgpio_irq_set_mask(struct irq_data *d, bool set)
{ … }

static void aspeed_sgpio_irq_mask(struct irq_data *d)
{ … }

static void aspeed_sgpio_irq_unmask(struct irq_data *d)
{ … }

static int aspeed_sgpio_set_type(struct irq_data *d, unsigned int type)
{ … }

static void aspeed_sgpio_irq_handler(struct irq_desc *desc)
{ … }

static void aspeed_sgpio_irq_print_chip(struct irq_data *d, struct seq_file *p)
{ … }

static const struct irq_chip aspeed_sgpio_irq_chip = …;

static int aspeed_sgpio_setup_irqs(struct aspeed_sgpio *gpio,
				   struct platform_device *pdev)
{ … }

static const struct aspeed_sgpio_pdata ast2400_sgpio_pdata = …;

static int aspeed_sgpio_reset_tolerance(struct gpio_chip *chip,
					unsigned int offset, bool enable)
{ … }

static int aspeed_sgpio_set_config(struct gpio_chip *chip, unsigned int offset,
				   unsigned long config)
{ … }

static const struct aspeed_sgpio_pdata ast2600_sgpiom_pdata = …;

static const struct of_device_id aspeed_sgpio_of_table[] = …;

MODULE_DEVICE_TABLE(of, aspeed_sgpio_of_table);

static int __init aspeed_sgpio_probe(struct platform_device *pdev)
{ … }

static struct platform_driver aspeed_sgpio_driver = …;

module_platform_driver_probe(…);
MODULE_DESCRIPTION(…) …;