/* SPDX-License-Identifier: GPL-2.0 */ /* Copyright 2018 Marty E. Plummer <[email protected]> */ /* Copyright 2019 Linaro, Ltd, Rob Herring <[email protected]> */ /* * Register definitions based on mali_midg_regmap.h * (C) COPYRIGHT 2010-2018 ARM Limited. All rights reserved. */ #ifndef __PANFROST_REGS_H__ #define __PANFROST_REGS_H__ #define GPU_ID … #define GPU_L2_FEATURES … #define GPU_CORE_FEATURES … #define GPU_TILER_FEATURES … #define GPU_MEM_FEATURES … #define GROUPS_L2_COHERENT … #define GPU_MMU_FEATURES … #define GPU_AS_PRESENT … #define GPU_JS_PRESENT … #define GPU_INT_RAWSTAT … #define GPU_INT_CLEAR … #define GPU_INT_MASK … #define GPU_INT_STAT … #define GPU_IRQ_FAULT … #define GPU_IRQ_MULTIPLE_FAULT … #define GPU_IRQ_RESET_COMPLETED … #define GPU_IRQ_POWER_CHANGED … #define GPU_IRQ_POWER_CHANGED_ALL … #define GPU_IRQ_PERFCNT_SAMPLE_COMPLETED … #define GPU_IRQ_CLEAN_CACHES_COMPLETED … #define GPU_IRQ_MASK_ALL … #define GPU_IRQ_MASK_ERROR … #define GPU_CMD … #define GPU_CMD_SOFT_RESET … #define GPU_CMD_HARD_RESET … #define GPU_CMD_PERFCNT_CLEAR … #define GPU_CMD_PERFCNT_SAMPLE … #define GPU_CMD_CYCLE_COUNT_START … #define GPU_CMD_CYCLE_COUNT_STOP … #define GPU_CMD_CLEAN_CACHES … #define GPU_CMD_CLEAN_INV_CACHES … #define GPU_STATUS … #define GPU_STATUS_PRFCNT_ACTIVE … #define GPU_LATEST_FLUSH_ID … #define GPU_PWR_KEY … #define GPU_PWR_KEY_UNLOCK … #define GPU_PWR_OVERRIDE0 … #define GPU_PWR_OVERRIDE1 … #define GPU_FAULT_STATUS … #define GPU_FAULT_ADDRESS_LO … #define GPU_FAULT_ADDRESS_HI … #define GPU_PERFCNT_BASE_LO … #define GPU_PERFCNT_BASE_HI … #define GPU_PERFCNT_CFG … #define GPU_PERFCNT_CFG_MODE(x) … #define GPU_PERFCNT_CFG_MODE_OFF … #define GPU_PERFCNT_CFG_MODE_MANUAL … #define GPU_PERFCNT_CFG_MODE_TILE … #define GPU_PERFCNT_CFG_AS(x) … #define GPU_PERFCNT_CFG_SETSEL(x) … #define GPU_PRFCNT_JM_EN … #define GPU_PRFCNT_SHADER_EN … #define GPU_PRFCNT_TILER_EN … #define GPU_PRFCNT_MMU_L2_EN … #define GPU_CYCLE_COUNT_LO … #define GPU_CYCLE_COUNT_HI … #define GPU_THREAD_MAX_THREADS … #define GPU_THREAD_MAX_WORKGROUP_SIZE … #define GPU_THREAD_MAX_BARRIER_SIZE … #define GPU_THREAD_FEATURES … #define GPU_THREAD_TLS_ALLOC … #define GPU_TEXTURE_FEATURES(n) … #define GPU_JS_FEATURES(n) … #define GPU_AFBC_FEATURES … #define GPU_SHADER_PRESENT_LO … #define GPU_SHADER_PRESENT_HI … #define GPU_TILER_PRESENT_LO … #define GPU_TILER_PRESENT_HI … #define GPU_L2_PRESENT_LO … #define GPU_L2_PRESENT_HI … #define GPU_COHERENCY_FEATURES … #define COHERENCY_ACE_LITE … #define COHERENCY_ACE … #define GPU_STACK_PRESENT_LO … #define GPU_STACK_PRESENT_HI … #define SHADER_READY_LO … #define SHADER_READY_HI … #define TILER_READY_LO … #define TILER_READY_HI … #define L2_READY_LO … #define L2_READY_HI … #define STACK_READY_LO … #define STACK_READY_HI … #define SHADER_PWRON_LO … #define SHADER_PWRON_HI … #define TILER_PWRON_LO … #define TILER_PWRON_HI … #define L2_PWRON_LO … #define L2_PWRON_HI … #define STACK_PWRON_LO … #define STACK_PWRON_HI … #define SHADER_PWROFF_LO … #define SHADER_PWROFF_HI … #define TILER_PWROFF_LO … #define TILER_PWROFF_HI … #define L2_PWROFF_LO … #define L2_PWROFF_HI … #define STACK_PWROFF_LO … #define STACK_PWROFF_HI … #define SHADER_PWRTRANS_LO … #define SHADER_PWRTRANS_HI … #define TILER_PWRTRANS_LO … #define TILER_PWRTRANS_HI … #define L2_PWRTRANS_LO … #define L2_PWRTRANS_HI … #define STACK_PWRTRANS_LO … #define STACK_PWRTRANS_HI … #define SHADER_PWRACTIVE_LO … #define SHADER_PWRACTIVE_HI … #define TILER_PWRACTIVE_LO … #define TILER_PWRACTIVE_HI … #define L2_PWRACTIVE_LO … #define L2_PWRACTIVE_HI … #define GPU_JM_CONFIG … #define GPU_SHADER_CONFIG … #define GPU_TILER_CONFIG … #define GPU_L2_MMU_CONFIG … /* L2_MMU_CONFIG register */ #define L2_MMU_CONFIG_ALLOW_SNOOP_DISPARITY_SHIFT … #define L2_MMU_CONFIG_ALLOW_SNOOP_DISPARITY … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_SHIFT … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_READS … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_OCTANT … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_QUARTER … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_READS_HALF … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_SHIFT … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_OCTANT … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_QUARTER … #define L2_MMU_CONFIG_LIMIT_EXTERNAL_WRITES_HALF … #define L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS_SHIFT … #define L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_READS … #define L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES_SHIFT … #define L2_MMU_CONFIG_3BIT_LIMIT_EXTERNAL_WRITES … /* SHADER_CONFIG register */ #define SC_ALT_COUNTERS … #define SC_OVERRIDE_FWD_PIXEL_KILL … #define SC_SDC_DISABLE_OQ_DISCARD … #define SC_LS_ALLOW_ATTR_TYPES … #define SC_LS_PAUSEBUFFER_DISABLE … #define SC_TLS_HASH_ENABLE … #define SC_LS_ATTR_CHECK_DISABLE … #define SC_ENABLE_TEXGRD_FLAGS … #define SC_VAR_ALGORITHM … /* End SHADER_CONFIG register */ /* TILER_CONFIG register */ #define TC_CLOCK_GATE_OVERRIDE … /* JM_CONFIG register */ #define JM_TIMESTAMP_OVERRIDE … #define JM_CLOCK_GATE_OVERRIDE … #define JM_JOB_THROTTLE_ENABLE … #define JM_JOB_THROTTLE_LIMIT_SHIFT … #define JM_MAX_JOB_THROTTLE_LIMIT … #define JM_FORCE_COHERENCY_FEATURES_SHIFT … #define JM_IDVS_GROUP_SIZE_SHIFT … #define JM_DEFAULT_IDVS_GROUP_SIZE … #define JM_MAX_IDVS_GROUP_SIZE … /* Job Control regs */ #define JOB_INT_RAWSTAT … #define JOB_INT_CLEAR … #define JOB_INT_MASK … #define JOB_INT_STAT … #define JOB_INT_JS_STATE … #define JOB_INT_THROTTLE … #define MK_JS_MASK(j) … #define JOB_INT_MASK_ERR(j) … #define JOB_INT_MASK_DONE(j) … #define JS_BASE … #define JS_SLOT_STRIDE … #define JS_HEAD_LO(n) … #define JS_HEAD_HI(n) … #define JS_TAIL_LO(n) … #define JS_TAIL_HI(n) … #define JS_AFFINITY_LO(n) … #define JS_AFFINITY_HI(n) … #define JS_CONFIG(n) … #define JS_XAFFINITY(n) … #define JS_COMMAND(n) … #define JS_STATUS(n) … #define JS_HEAD_NEXT_LO(n) … #define JS_HEAD_NEXT_HI(n) … #define JS_AFFINITY_NEXT_LO(n) … #define JS_AFFINITY_NEXT_HI(n) … #define JS_CONFIG_NEXT(n) … #define JS_COMMAND_NEXT(n) … #define JS_FLUSH_ID_NEXT(n) … /* Possible values of JS_CONFIG and JS_CONFIG_NEXT registers */ #define JS_CONFIG_START_FLUSH_CLEAN … #define JS_CONFIG_START_FLUSH_CLEAN_INVALIDATE … #define JS_CONFIG_START_MMU … #define JS_CONFIG_JOB_CHAIN_FLAG … #define JS_CONFIG_END_FLUSH_CLEAN … #define JS_CONFIG_END_FLUSH_CLEAN_INVALIDATE … #define JS_CONFIG_ENABLE_FLUSH_REDUCTION … #define JS_CONFIG_DISABLE_DESCRIPTOR_WR_BK … #define JS_CONFIG_THREAD_PRI(n) … #define JS_COMMAND_NOP … #define JS_COMMAND_START … #define JS_COMMAND_SOFT_STOP … #define JS_COMMAND_HARD_STOP … #define JS_COMMAND_SOFT_STOP_0 … #define JS_COMMAND_HARD_STOP_0 … #define JS_COMMAND_SOFT_STOP_1 … #define JS_COMMAND_HARD_STOP_1 … /* MMU regs */ #define MMU_INT_RAWSTAT … #define MMU_INT_CLEAR … #define MMU_INT_MASK … #define MMU_INT_STAT … /* AS_COMMAND register commands */ #define AS_COMMAND_NOP … #define AS_COMMAND_UPDATE … #define AS_COMMAND_LOCK … #define AS_COMMAND_UNLOCK … #define AS_COMMAND_FLUSH … #define AS_COMMAND_FLUSH_PT … #define AS_COMMAND_FLUSH_MEM … #define MMU_BASE … #define MMU_AS_SHIFT … #define MMU_AS(as) … #define AS_TRANSTAB_LO(as) … #define AS_TRANSTAB_HI(as) … #define AS_MEMATTR_LO(as) … #define AS_MEMATTR_HI(as) … #define AS_LOCKADDR_LO(as) … #define AS_LOCKADDR_HI(as) … #define AS_COMMAND(as) … #define AS_FAULTSTATUS(as) … #define AS_FAULTADDRESS_LO(as) … #define AS_FAULTADDRESS_HI(as) … #define AS_STATUS(as) … /* Additional Bifrost AS registers */ #define AS_TRANSCFG_LO(as) … #define AS_TRANSCFG_HI(as) … #define AS_FAULTEXTRA_LO(as) … #define AS_FAULTEXTRA_HI(as) … #define MMU_AS_STRIDE … /* * Begin LPAE MMU TRANSTAB register values */ #define AS_TRANSTAB_LPAE_ADDR_SPACE_MASK … #define AS_TRANSTAB_LPAE_ADRMODE_IDENTITY … #define AS_TRANSTAB_LPAE_ADRMODE_TABLE … #define AS_TRANSTAB_LPAE_ADRMODE_MASK … #define AS_TRANSTAB_LPAE_READ_INNER … #define AS_TRANSTAB_LPAE_SHARE_OUTER … #define AS_STATUS_AS_ACTIVE … #define AS_FAULTSTATUS_ACCESS_TYPE_MASK … #define AS_FAULTSTATUS_ACCESS_TYPE_ATOMIC … #define AS_FAULTSTATUS_ACCESS_TYPE_EX … #define AS_FAULTSTATUS_ACCESS_TYPE_READ … #define AS_FAULTSTATUS_ACCESS_TYPE_WRITE … #define AS_LOCK_REGION_MIN_SIZE … #define gpu_write(dev, reg, data) … #define gpu_read(dev, reg) … #endif
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