// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2020 Unisoc Inc. */ #include <linux/component.h> #include <linux/module.h> #include <linux/of.h> #include <linux/platform_device.h> #include <video/mipi_display.h> #include <drm/drm_atomic_helper.h> #include <drm/drm_bridge.h> #include <drm/drm_of.h> #include <drm/drm_probe_helper.h> #include "sprd_drm.h" #include "sprd_dpu.h" #include "sprd_dsi.h" #define SOFT_RESET … #define MASK_PROTOCOL_INT … #define MASK_INTERNAL_INT … #define DSI_MODE_CFG … #define VIRTUAL_CHANNEL_ID … #define GEN_RX_VCID … #define VIDEO_PKT_VCID … #define DPI_VIDEO_FORMAT … #define DPI_VIDEO_MODE_FORMAT … #define LOOSELY18_EN … #define VIDEO_PKT_CONFIG … #define VIDEO_PKT_SIZE … #define VIDEO_LINE_CHUNK_NUM … #define VIDEO_LINE_HBLK_TIME … #define VIDEO_LINE_HBP_TIME … #define VIDEO_LINE_HSA_TIME … #define VIDEO_LINE_TIME … #define VIDEO_VBLK_LINES … #define VFP_LINES … #define VBP_LINES … #define VSA_LINES … #define VIDEO_VACTIVE_LINES … #define VID_MODE_CFG … #define VID_MODE_TYPE … #define LP_VSA_EN … #define LP_VBP_EN … #define LP_VFP_EN … #define LP_VACT_EN … #define LP_HBP_EN … #define LP_HFP_EN … #define FRAME_BTA_ACK_EN … #define TIMEOUT_CNT_CLK_CONFIG … #define HTX_TO_CONFIG … #define LRX_H_TO_CONFIG … #define TX_ESC_CLK_CONFIG … #define CMD_MODE_CFG … #define TEAR_FX_EN … #define GEN_HDR … #define GEN_DT … #define GEN_VC … #define GEN_PLD_DATA … #define PHY_CLK_LANE_LP_CTRL … #define PHY_CLKLANE_TX_REQ_HS … #define AUTO_CLKLANE_CTRL_EN … #define PHY_INTERFACE_CTRL … #define RF_PHY_SHUTDOWN … #define RF_PHY_RESET_N … #define RF_PHY_CLK_EN … #define CMD_MODE_STATUS … #define GEN_CMD_RDATA_FIFO_EMPTY … #define GEN_CMD_WDATA_FIFO_EMPTY … #define GEN_CMD_CMD_FIFO_EMPTY … #define GEN_CMD_RDCMD_DONE … #define PHY_STATUS … #define PHY_LOCK … #define PHY_MIN_STOP_TIME … #define PHY_LANE_NUM_CONFIG … #define PHY_CLKLANE_TIME_CONFIG … #define PHY_CLKLANE_LP_TO_HS_TIME … #define PHY_CLKLANE_HS_TO_LP_TIME … #define PHY_DATALANE_TIME_CONFIG … #define PHY_DATALANE_LP_TO_HS_TIME … #define PHY_DATALANE_HS_TO_LP_TIME … #define MAX_READ_TIME … #define RX_PKT_CHECK_CONFIG … #define RX_PKT_ECC_EN … #define RX_PKT_CRC_EN … #define TA_EN … #define EOTP_EN … #define TX_EOTP_EN … #define RX_EOTP_EN … #define VIDEO_NULLPKT_SIZE … #define DCS_WM_PKT_SIZE … #define VIDEO_SIG_DELAY_CONFIG … #define VIDEO_SIG_DELAY … #define PHY_TST_CTRL0 … #define PHY_TESTCLR … #define PHY_TESTCLK … #define PHY_TST_CTRL1 … #define PHY_TESTDIN … #define PHY_TESTDOUT … #define PHY_TESTEN … #define host_to_dsi(host) … static inline u32 dsi_reg_rd(struct dsi_context *ctx, u32 offset, u32 mask, u32 shift) { … } static inline void dsi_reg_wr(struct dsi_context *ctx, u32 offset, u32 mask, u32 shift, u32 val) { … } static inline void dsi_reg_up(struct dsi_context *ctx, u32 offset, u32 mask, u32 val) { … } static int regmap_tst_io_write(void *context, u32 reg, u32 val) { … } static int regmap_tst_io_read(void *context, u32 reg, u32 *val) { … } static struct regmap_bus regmap_tst_io = …; static const struct regmap_config byte_config = …; static int dphy_wait_pll_locked(struct dsi_context *ctx) { … } static int dsi_wait_tx_payload_fifo_empty(struct dsi_context *ctx) { … } static int dsi_wait_tx_cmd_fifo_empty(struct dsi_context *ctx) { … } static int dsi_wait_rd_resp_completed(struct dsi_context *ctx) { … } static u16 calc_bytes_per_pixel_x100(int coding) { … } static u8 calc_video_size_step(int coding) { … } static u16 round_video_size(int coding, u16 video_size) { … } #define SPRD_MIPI_DSI_FMT_DSC … static u32 fmt_to_coding(u32 fmt) { … } #define ns_to_cycle(ns, byte_clk) … static void sprd_dsi_init(struct dsi_context *ctx) { … } /* * Free up resources and shutdown host controller and PHY */ static void sprd_dsi_fini(struct dsi_context *ctx) { … } /* * If not in burst mode, it will compute the video and null packet sizes * according to necessity. * Configure timers for data lanes and/or clock lane to return to LP when * bandwidth is not filled by data. */ static int sprd_dsi_dpi_video(struct dsi_context *ctx) { … } static void sprd_dsi_edpi_video(struct dsi_context *ctx) { … } /* * Send a packet on the generic interface, * this function has an active delay to wait for the buffer to clear. * The delay is limited to: * (param_length / 4) x DSIH_FIFO_ACTIVE_WAIT x register access time * the controller restricts the sending of. * * This function will not be able to send Null and Blanking packets due to * controller restriction */ static int sprd_dsi_wr_pkt(struct dsi_context *ctx, u8 vc, u8 type, const u8 *param, u16 len) { … } /* * Send READ packet to peripheral using the generic interface, * this will force command mode and stop video mode (because of BTA). * * This function has an active delay to wait for the buffer to clear, * the delay is limited to 2 x DSIH_FIFO_ACTIVE_WAIT * (waiting for command buffer, and waiting for receiving) * @note this function will enable BTA */ static int sprd_dsi_rd_pkt(struct dsi_context *ctx, u8 vc, u8 type, u8 msb_byte, u8 lsb_byte, u8 *buffer, u8 bytes_to_read) { … } static void sprd_dsi_set_work_mode(struct dsi_context *ctx, u8 mode) { … } static void sprd_dsi_state_reset(struct dsi_context *ctx) { … } static int sprd_dphy_init(struct dsi_context *ctx) { … } static void sprd_dphy_fini(struct dsi_context *ctx) { … } static void sprd_dsi_encoder_mode_set(struct drm_encoder *encoder, struct drm_display_mode *mode, struct drm_display_mode *adj_mode) { … } static void sprd_dsi_encoder_enable(struct drm_encoder *encoder) { … } static void sprd_dsi_encoder_disable(struct drm_encoder *encoder) { … } static const struct drm_encoder_helper_funcs sprd_encoder_helper_funcs = …; static const struct drm_encoder_funcs sprd_encoder_funcs = …; static int sprd_dsi_encoder_init(struct sprd_dsi *dsi, struct device *dev) { … } static int sprd_dsi_bridge_init(struct sprd_dsi *dsi, struct device *dev) { … } static int sprd_dsi_context_init(struct sprd_dsi *dsi, struct device *dev) { … } static int sprd_dsi_bind(struct device *dev, struct device *master, void *data) { … } static void sprd_dsi_unbind(struct device *dev, struct device *master, void *data) { … } static const struct component_ops dsi_component_ops = …; static int sprd_dsi_host_attach(struct mipi_dsi_host *host, struct mipi_dsi_device *slave) { … } static int sprd_dsi_host_detach(struct mipi_dsi_host *host, struct mipi_dsi_device *slave) { … } static ssize_t sprd_dsi_host_transfer(struct mipi_dsi_host *host, const struct mipi_dsi_msg *msg) { … } static const struct mipi_dsi_host_ops sprd_dsi_host_ops = …; static const struct of_device_id dsi_match_table[] = …; static int sprd_dsi_probe(struct platform_device *pdev) { … } static void sprd_dsi_remove(struct platform_device *pdev) { … } struct platform_driver sprd_dsi_driver = …; MODULE_AUTHOR(…) …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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