/* SPDX-License-Identifier: GPL-2.0 */ /* * Intel SoC PMIC Driver * * Copyright (C) 2012-2014 Intel Corporation. All rights reserved. * * Author: Yang, Bin <[email protected]> * Author: Zhu, Lejun <[email protected]> */ #ifndef __INTEL_SOC_PMIC_H__ #define __INTEL_SOC_PMIC_H__ #include <linux/regmap.h> enum intel_cht_wc_models { … }; /** * struct intel_soc_pmic - Intel SoC PMIC data * @irq: Master interrupt number of the parent PMIC device * @regmap: Pointer to the parent PMIC device regmap structure * @irq_chip_data: IRQ chip data for the PMIC itself * @irq_chip_data_pwrbtn: Chained IRQ chip data for the Power Button * @irq_chip_data_tmu: Chained IRQ chip data for the Time Management Unit * @irq_chip_data_bcu: Chained IRQ chip data for the Burst Control Unit * @irq_chip_data_adc: Chained IRQ chip data for the General Purpose ADC * @irq_chip_data_chgr: Chained IRQ chip data for the External Charger * @irq_chip_data_crit: Chained IRQ chip data for the Critical Event Handler * @dev: Pointer to the parent PMIC device * @scu: Pointer to the SCU IPC device data structure */ struct intel_soc_pmic { … }; int intel_soc_pmic_exec_mipi_pmic_seq_element(u16 i2c_address, u32 reg_address, u32 value, u32 mask); #endif /* __INTEL_SOC_PMIC_H__ */