#include <linux/types.h>
#include <linux/bitrev.h>
#include <linux/io.h>
#include <linux/sizes.h>
#include <drm/drm_fourcc.h>
#include "ipu-prv.h"
struct ipu_cpmem_word { … };
struct ipu_ch_param { … };
struct ipu_cpmem { … };
#define IPU_CPMEM_WORD(word, ofs, size) …
#define IPU_FIELD_UBO …
#define IPU_FIELD_VBO …
#define IPU_FIELD_IOX …
#define IPU_FIELD_RDRW …
#define IPU_FIELD_SO …
#define IPU_FIELD_SLY …
#define IPU_FIELD_SLUV …
#define IPU_FIELD_XV …
#define IPU_FIELD_YV …
#define IPU_FIELD_XB …
#define IPU_FIELD_YB …
#define IPU_FIELD_NSB_B …
#define IPU_FIELD_CF …
#define IPU_FIELD_SX …
#define IPU_FIELD_SY …
#define IPU_FIELD_NS …
#define IPU_FIELD_SDX …
#define IPU_FIELD_SM …
#define IPU_FIELD_SCC …
#define IPU_FIELD_SCE …
#define IPU_FIELD_SDY …
#define IPU_FIELD_SDRX …
#define IPU_FIELD_SDRY …
#define IPU_FIELD_BPP …
#define IPU_FIELD_DEC_SEL …
#define IPU_FIELD_DIM …
#define IPU_FIELD_BNDM …
#define IPU_FIELD_BM …
#define IPU_FIELD_ROT …
#define IPU_FIELD_ROT_HF_VF …
#define IPU_FIELD_HF …
#define IPU_FIELD_VF …
#define IPU_FIELD_THE …
#define IPU_FIELD_CAP …
#define IPU_FIELD_CAE …
#define IPU_FIELD_FW …
#define IPU_FIELD_FH …
#define IPU_FIELD_EBA0 …
#define IPU_FIELD_EBA1 …
#define IPU_FIELD_ILO …
#define IPU_FIELD_NPB …
#define IPU_FIELD_PFS …
#define IPU_FIELD_ALU …
#define IPU_FIELD_ALBM …
#define IPU_FIELD_ID …
#define IPU_FIELD_TH …
#define IPU_FIELD_SL …
#define IPU_FIELD_WID0 …
#define IPU_FIELD_WID1 …
#define IPU_FIELD_WID2 …
#define IPU_FIELD_WID3 …
#define IPU_FIELD_OFS0 …
#define IPU_FIELD_OFS1 …
#define IPU_FIELD_OFS2 …
#define IPU_FIELD_OFS3 …
#define IPU_FIELD_SXYS …
#define IPU_FIELD_CRE …
#define IPU_FIELD_DEC_SEL2 …
static inline struct ipu_ch_param __iomem *
ipu_get_cpmem(struct ipuv3_channel *ch)
{ … }
static void ipu_ch_param_write_field(struct ipuv3_channel *ch, u32 wbs, u32 v)
{ … }
static u32 ipu_ch_param_read_field(struct ipuv3_channel *ch, u32 wbs)
{ … }
static int v4l2_pix_fmt_to_drm_fourcc(u32 pixelformat)
{ … }
void ipu_cpmem_zero(struct ipuv3_channel *ch)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_resolution(struct ipuv3_channel *ch, int xres, int yres)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_skip_odd_chroma_rows(struct ipuv3_channel *ch)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_stride(struct ipuv3_channel *ch, int stride)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_high_priority(struct ipuv3_channel *ch)
{
struct ipu_soc *ipu = ch->ipu;
u32 val;
if (ipu->ipu_type == IPUV3EX)
ipu_ch_param_write_field(ch, IPU_FIELD_ID, 1);
val = ipu_idmac_read(ipu, IDMAC_CHA_PRI(ch->num));
val |= 1 << (ch->num % 32);
ipu_idmac_write(ipu, val, IDMAC_CHA_PRI(ch->num));
};
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_buffer(struct ipuv3_channel *ch, int bufnum, dma_addr_t buf)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_uv_offset(struct ipuv3_channel *ch, u32 u_off, u32 v_off)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_interlaced_scan(struct ipuv3_channel *ch, int stride,
u32 pixelformat)
{
u32 ilo, sly, sluv;
if (stride < 0) {
stride = -stride;
ilo = 0x100000 - (stride / 8);
} else {
ilo = stride / 8;
}
sly = (stride * 2) - 1;
switch (pixelformat) {
case V4L2_PIX_FMT_YUV420:
case V4L2_PIX_FMT_YVU420:
sluv = stride / 2 - 1;
break;
case V4L2_PIX_FMT_NV12:
sluv = stride - 1;
break;
case V4L2_PIX_FMT_YUV422P:
sluv = stride - 1;
break;
case V4L2_PIX_FMT_NV16:
sluv = stride * 2 - 1;
break;
default:
sluv = 0;
break;
}
ipu_ch_param_write_field(ch, IPU_FIELD_SO, 1);
ipu_ch_param_write_field(ch, IPU_FIELD_ILO, ilo);
ipu_ch_param_write_field(ch, IPU_FIELD_SLY, sly);
if (sluv)
ipu_ch_param_write_field(ch, IPU_FIELD_SLUV, sluv);
};
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_axi_id(struct ipuv3_channel *ch, u32 id)
{ … }
EXPORT_SYMBOL_GPL(…);
int ipu_cpmem_get_burstsize(struct ipuv3_channel *ch)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_burstsize(struct ipuv3_channel *ch, int burstsize)
{
ipu_ch_param_write_field(ch, IPU_FIELD_NPB, burstsize - 1);
};
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_block_mode(struct ipuv3_channel *ch)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_rotation(struct ipuv3_channel *ch,
enum ipu_rotate_mode rot)
{ … }
EXPORT_SYMBOL_GPL(…);
int ipu_cpmem_set_format_rgb(struct ipuv3_channel *ch,
const struct ipu_rgb *rgb)
{ … }
EXPORT_SYMBOL_GPL(…);
int ipu_cpmem_set_format_passthrough(struct ipuv3_channel *ch, int width)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_yuv_interleaved(struct ipuv3_channel *ch, u32 pixel_format)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_set_yuv_planar_full(struct ipuv3_channel *ch,
unsigned int uv_stride,
unsigned int u_offset, unsigned int v_offset)
{ … }
EXPORT_SYMBOL_GPL(…);
static const struct ipu_rgb def_xrgb_32 = …;
static const struct ipu_rgb def_xbgr_32 = …;
static const struct ipu_rgb def_rgbx_32 = …;
static const struct ipu_rgb def_bgrx_32 = …;
static const struct ipu_rgb def_rgb_24 = …;
static const struct ipu_rgb def_bgr_24 = …;
static const struct ipu_rgb def_rgb_16 = …;
static const struct ipu_rgb def_bgr_16 = …;
static const struct ipu_rgb def_argb_16 = …;
static const struct ipu_rgb def_argb_16_4444 = …;
static const struct ipu_rgb def_abgr_16 = …;
static const struct ipu_rgb def_rgba_16 = …;
static const struct ipu_rgb def_bgra_16 = …;
#define Y_OFFSET(pix, x, y) …
#define U_OFFSET(pix, x, y) …
#define V_OFFSET(pix, x, y) …
#define U2_OFFSET(pix, x, y) …
#define V2_OFFSET(pix, x, y) …
#define UV_OFFSET(pix, x, y) …
#define UV2_OFFSET(pix, x, y) …
#define NUM_ALPHA_CHANNELS …
static int ipu_channel_albm(int ch_num)
{ … }
static void ipu_cpmem_set_separate_alpha(struct ipuv3_channel *ch)
{ … }
int ipu_cpmem_set_fmt(struct ipuv3_channel *ch, u32 drm_fourcc)
{ … }
EXPORT_SYMBOL_GPL(…);
int ipu_cpmem_set_image(struct ipuv3_channel *ch, struct ipu_image *image)
{ … }
EXPORT_SYMBOL_GPL(…);
void ipu_cpmem_dump(struct ipuv3_channel *ch)
{ … }
EXPORT_SYMBOL_GPL(…);
int ipu_cpmem_init(struct ipu_soc *ipu, struct device *dev, unsigned long base)
{ … }
void ipu_cpmem_exit(struct ipu_soc *ipu)
{ … }