/* SPDX-License-Identifier: GPL-2.0-or-later */ /* * SN Platform GRU Driver * * GRU HANDLE DEFINITION * * Copyright (c) 2008 Silicon Graphics, Inc. All Rights Reserved. */ #ifndef __GRUHANDLES_H__ #define __GRUHANDLES_H__ #include "gru_instructions.h" /* * Manifest constants for GRU Memory Map */ #define GRU_GSEG0_BASE … #define GRU_MCS_BASE … #define GRU_SIZE … /* Handle & resource counts */ #define GRU_NUM_CB … #define GRU_NUM_DSR_BYTES … #define GRU_NUM_TFM … #define GRU_NUM_TGH … #define GRU_NUM_CBE … #define GRU_NUM_TFH … #define GRU_NUM_CCH … /* Maximum resource counts that can be reserved by user programs */ #define GRU_NUM_USER_CBR … #define GRU_NUM_USER_DSR_BYTES … /* Bytes per handle & handle stride. Code assumes all cb, tfh, cbe handles * are the same */ #define GRU_HANDLE_BYTES … #define GRU_HANDLE_STRIDE … /* Base addresses of handles */ #define GRU_TFM_BASE … #define GRU_TGH_BASE … #define GRU_CBE_BASE … #define GRU_TFH_BASE … #define GRU_CCH_BASE … /* User gseg constants */ #define GRU_GSEG_STRIDE … #define GSEG_BASE(a) … /* Data segment constants */ #define GRU_DSR_AU_BYTES … #define GRU_DSR_CL … #define GRU_DSR_AU_CL … #define GRU_DSR_AU … /* Control block constants */ #define GRU_CBR_AU_SIZE … #define GRU_CBR_AU … /* Convert resource counts to the number of AU */ #define GRU_DS_BYTES_TO_AU(n) … #define GRU_CB_COUNT_TO_AU(n) … /* UV limits */ #define GRU_CHIPLETS_PER_HUB … #define GRU_HUBS_PER_BLADE … #define GRU_CHIPLETS_PER_BLADE … /* User GRU Gseg offsets */ #define GRU_CB_BASE … #define GRU_CB_LIMIT … #define GRU_DS_BASE … #define GRU_DS_LIMIT … /* Convert a GRU physical address to the chiplet offset */ #define GSEGPOFF(h) … /* Convert an arbitrary handle address to the beginning of the GRU segment */ #define GRUBASE(h) … /* Test a valid handle address to determine the type */ #define TYPE_IS(hn, h) … /* General addressing macros. */ static inline void *get_gseg_base_address(void *base, int ctxnum) { … } static inline void *get_gseg_base_address_cb(void *base, int ctxnum, int line) { … } static inline void *get_gseg_base_address_ds(void *base, int ctxnum, int line) { … } static inline struct gru_tlb_fault_map *get_tfm(void *base, int ctxnum) { … } static inline struct gru_tlb_global_handle *get_tgh(void *base, int ctxnum) { … } static inline struct gru_control_block_extended *get_cbe(void *base, int ctxnum) { … } static inline struct gru_tlb_fault_handle *get_tfh(void *base, int ctxnum) { … } static inline struct gru_context_configuration_handle *get_cch(void *base, int ctxnum) { … } static inline unsigned long get_cb_number(void *cb) { … } /* byte offset to a specific GRU chiplet. (p=pnode, c=chiplet (0 or 1)*/ static inline unsigned long gru_chiplet_paddr(unsigned long paddr, int pnode, int chiplet) { … } static inline void *gru_chiplet_vaddr(void *vaddr, int pnode, int chiplet) { … } static inline struct gru_control_block_extended *gru_tfh_to_cbe( struct gru_tlb_fault_handle *tfh) { … } /* * Global TLB Fault Map * Bitmap of outstanding TLB misses needing interrupt/polling service. * */ struct gru_tlb_fault_map { … }; /* * TGH - TLB Global Handle * Used for TLB flushing. * */ struct gru_tlb_global_handle { … }; enum gru_tgh_cmd { … }; enum gru_tgh_opc { … }; enum gru_tgh_status { … }; enum gru_tgh_state { … }; enum gru_tgh_cause { … }; /* * TFH - TLB Global Handle * Used for TLB dropins into the GRU TLB. * */ struct gru_tlb_fault_handle { … }; enum gru_tfh_opc { … }; enum tfh_status { … }; enum tfh_state { … }; /* TFH cause bits */ enum tfh_cause { … }; /* GAA values */ #define GAA_RAM … #define GAA_NCRAM … #define GAA_MMIO … #define GAA_REGISTER … /* GRU paddr shift for pfn. (NOTE: shift is NOT by actual pagesize) */ #define GRU_PADDR_SHIFT … /* * Context Configuration handle * Used to allocate resources to a GSEG context. * */ struct gru_context_configuration_handle { … } __attribute__ ((packed)); enum gru_cch_opc { … }; enum gru_cch_status { … }; enum gru_cch_state { … }; /* CCH Exception cause */ enum gru_cch_cause { … }; /* * CBE - Control Block Extended * Maintains internal GRU state for active CBs. * */ struct gru_control_block_extended { … }; /* CBE fields for active BCOPY instructions */ #define cbe_baddr0 … #define cbe_baddr1 … #define cbe_src_cl … #define cbe_nelemcur … enum gru_cbr_state { … }; /* CBE cbrexecstatus bits - defined in gru_instructions.h*/ /* CBE ecause bits - defined in gru_instructions.h */ /* * Convert a processor pagesize into the strange encoded pagesize used by the * GRU. Processor pagesize is encoded as log of bytes per page. (or PAGE_SHIFT) * pagesize log pagesize grupagesize * 4k 12 0 * 16k 14 1 * 64k 16 2 * 256k 18 3 * 1m 20 4 * 2m 21 5 * 4m 22 6 * 16m 24 7 * 64m 26 8 * ... */ #define GRU_PAGESIZE(sh) … #define GRU_SIZEAVAIL(sh) … /* minimum TLB purge count to ensure a full purge */ #define GRUMAXINVAL … int cch_allocate(struct gru_context_configuration_handle *cch); int cch_start(struct gru_context_configuration_handle *cch); int cch_interrupt(struct gru_context_configuration_handle *cch); int cch_deallocate(struct gru_context_configuration_handle *cch); int cch_interrupt_sync(struct gru_context_configuration_handle *cch); int tgh_invalidate(struct gru_tlb_global_handle *tgh, unsigned long vaddr, unsigned long vaddrmask, int asid, int pagesize, int global, int n, unsigned short ctxbitmap); int tfh_write_only(struct gru_tlb_fault_handle *tfh, unsigned long paddr, int gaa, unsigned long vaddr, int asid, int dirty, int pagesize); void tfh_write_restart(struct gru_tlb_fault_handle *tfh, unsigned long paddr, int gaa, unsigned long vaddr, int asid, int dirty, int pagesize); void tfh_user_polling_mode(struct gru_tlb_fault_handle *tfh); void tfh_exception(struct gru_tlb_fault_handle *tfh); #endif /* __GRUHANDLES_H__ */
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