linux/drivers/gpio/gpio-ich.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
 *
 * Copyright (C) 2010 Extreme Engineering Solutions.
 */

#include <linux/bitops.h>
#include <linux/gpio/driver.h>
#include <linux/ioport.h>
#include <linux/mfd/lpc_ich.h>
#include <linux/module.h>
#include <linux/platform_device.h>

#define DRV_NAME …

/*
 * GPIO register offsets in GPIO I/O space.
 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and
 * LVLx registers.  Logic in the read/write functions takes a register and
 * an absolute bit number and determines the proper register offset and bit
 * number in that register.  For example, to read the value of GPIO bit 50
 * the code would access offset ichx_regs[2(=GPIO_LVL)][1(=50/32)],
 * bit 18 (50%32).
 */
enum GPIO_REG { … };

static const u8 ichx_regs[4][3] = …;

static const u8 ichx_reglen[3] = …;

static const u8 avoton_regs[4][3] = …;

static const u8 avoton_reglen[3] = …;

#define ICHX_WRITE(val, reg, base_res) …
#define ICHX_READ(reg, base_res) …

struct ichx_desc { … };

static struct { … } ichx_priv;

static int modparam_gpiobase = …;	/* dynamic */
module_param_named(gpiobase, modparam_gpiobase, int, 0444);
MODULE_PARM_DESC(…) …;

static int ichx_write_bit(int reg, unsigned int nr, int val, int verify)
{ … }

static int ichx_read_bit(int reg, unsigned int nr)
{ … }

static bool ichx_gpio_check_available(struct gpio_chip *gpio, unsigned int nr)
{ … }

static int ichx_gpio_get_direction(struct gpio_chip *gpio, unsigned int nr)
{ … }

static int ichx_gpio_direction_input(struct gpio_chip *gpio, unsigned int nr)
{ … }

static int ichx_gpio_direction_output(struct gpio_chip *gpio, unsigned int nr,
					int val)
{ … }

static int ichx_gpio_get(struct gpio_chip *chip, unsigned int nr)
{ … }

static int ich6_gpio_get(struct gpio_chip *chip, unsigned int nr)
{ … }

static int ichx_gpio_request(struct gpio_chip *chip, unsigned int nr)
{ … }

static int ich6_gpio_request(struct gpio_chip *chip, unsigned int nr)
{ … }

static void ichx_gpio_set(struct gpio_chip *chip, unsigned int nr, int val)
{ … }

static void ichx_gpiolib_setup(struct gpio_chip *chip)
{ … }

/* ICH6-based, 631xesb-based */
static struct ichx_desc ich6_desc = …;

/* Intel 3100 */
static struct ichx_desc i3100_desc = …;

/* ICH7 and ICH8-based */
static struct ichx_desc ich7_desc = …;

/* ICH9-based */
static struct ichx_desc ich9_desc = …;

/* ICH10-based - Consumer/corporate versions have different amount of GPIO */
static struct ichx_desc ich10_cons_desc = …;
static struct ichx_desc ich10_corp_desc = …;

/* Intel 5 series, 6 series, 3400 series, and C200 series */
static struct ichx_desc intel5_desc = …;

/* Avoton */
static struct ichx_desc avoton_desc = …;

static int ichx_gpio_request_regions(struct device *dev,
	struct resource *res_base, const char *name, u8 use_gpio)
{ … }

static int ichx_gpio_probe(struct platform_device *pdev)
{ … }

static struct platform_driver ichx_gpio_driver = …;

module_platform_driver(…) …;

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
MODULE_ALIAS(…) …;